Hybrid postprocessing etching for CMOS-compatible MEMS

Abstract

A major limitation in the fabrication of microstructures as a postCMOS (complimentary metal oxide semiconductor) process has been overcome by the development of a hybrid processing technique, which combines both an isotropic and anisotropic etch step. Using this hybrid technique, microelectromechanical structures with sizes ranging from 0.05 to 1 mm in width and up to 6 mm in length were fabricated in CMOS technology. The mechanical robustness of the microstructures determines the limit on their dimensions. Examples of an application of this hybrid technique to produce microwave coplanar transmission lines are presented. The performance of the micromachined microwave coplanar waveguides meets the design specifications of low loss, high phase velocity, and 50characteristic impedance. Various commonly used etchants were investigated for topside maskless postmicromachining of h100i silicon wafers to obtain the microstructures. The isotropic etchant used is gas-phase xenon difluoride (XeF2), while the wet anisotropic etchants are either ethylenediamine-pyrocatechol (EDP) or tetramethylammonium hydroxide (TMAH). The advantages and disadvantages of these etchants with respect to selectivity, reproducibility, handling, and process compatibility are also described. [258] Index Terms-CMOS microwave elements, isotropic and anisotropic silicon etching, maskless etching, microelectromechanical systems (MEMS), micromachining, suspended transmission lines.

Nanophotonic integration in state-of-the-art CMOS foundries

“…The microelectromechanical systems (MEMS) community has utilized similar post-processing techniques to create a variety of sensors within standard CMOS processes for over a decade [28]. Recently, Akustica, a subsidiary of Bosch Sensortec GmbH, has demonstrated the commercial viability of such an approach by the sale of over 5 million suspended-layer microphones integrated alongside the necessary interface circuitry in standard CMOS processes [29].…”

Electrical isolation of dislocations in Ge layers on Si(001) substrates through CMOS-compatible suspended structures

“…Anisotropic etchants, such as potassium hydroxide (KOH) or tetramethylammonium hydroxide (TMAH), have also been used to create suspended structures by a 'brute-force' etch against the etch-resistive {111} planes in Si(001) substrates [10,11]. An alternative method has been to use a post-CMOS fabrication technique to create suspended micro-hotplates [12,13], exploiting the underetching rates of a Si(001) substrate in TMAH [14][15][16]. This processing works on a Si(001) substrate by patterning the active layer, away from the surface 110 directions, thus avoiding the {111} etch-resistive planes during the etching.…”

RF components for wireless communication using CM-CMOS technology

“…Because this etching and other micromachining techniques are performed after a standard CMOS process is completed, they are frequently called post-CMOS processing or post-processing. Maskless post-processing of CMOS has been develw x oped by Baltes et al in 10 and later improved by w x Tea et al 11 . Most of the thin films available in CMOS have the essential properties needed in sensor and actuator applications, such as piezoresistance in polysilicon films, but they have to be controlled very closely since they exhibit many nonlinear effects.…”