Characterization of multi-barrier tunneling diodes and vertical transistors using 2-D device simulation

Kim, Kwan-Do; Lee, Keun-Ho; Baik, Seung Jae; Lee, Jun-Ha; Kim, Tai-Kyung; Kong, Jeong-Taek

doi:10.1109/sispad.2002.1034543

Cited by 3 publications

(3 citation statements)

References 5 publications

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“…In addition, the temperature-dependent characteristics and circuit characteristics of FGFET devices and their potential for use in neural networks were analyzed for the first time. The FGFET structure is based on STTM (scalable two-transistor memory) and PLEDM (phase stat low-electron-number drive random access memory), which were previously announced by Samsung Electronics and Hitachi to replace DRAM and NAND flash memory [11][12][13][14][15][16]. The FGFET stacks a floating node that stores data on the gate of a conventional metal oxide semiconductor field effect transistor (MOSFET), and the write, storage, and read modes of the data are performed by applying voltages to the data line (DL), word line (WL), and sense line (SL).…”

Section: Introductionmentioning

confidence: 99%

Analyzing Various Structural and Temperature Characteristics of Floating Gate Field Effect Transistors Applicable to Fine-Grain Logic-in-Memory Devices

Cho,

Kim,

Kang

et al. 2024

Micromachines

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Although the von Neumann architecture-based computing system has been used for a long time, its limitations in data processing, energy consumption, etc. have led to research on various devices and circuit systems suitable for logic-in-memory (LiM) computing applications. In this paper, we analyze the temperature-dependent device and circuit characteristics of the floating gate field effect transistor (FGFET) source drain barrier (SDB) and FGFET central shallow barrier (CSB) identified in previous papers, and their applicability to LiM applications is specifically confirmed. These FGFETs have the advantage of being much more compatible with existing silicon-based complementary metal oxide semiconductor (CMOS) processes compared to devices using new materials such as ferroelectrics for LiM computing. Utilizing the 32 nm technology node, the leading-edge node where the planar metal oxide semiconductor field effect transistor structure is applied, FGFET devices were analyzed in TCAD, and an environment for analyzing circuits in HSPICE was established. To seamlessly connect FGFET-based devices and circuit analyses, compact models of FGFET-SDB and -CSBs were developed and applied to the design of ternary content-addressable memory (TCAM) and full adder (FA) circuits for LiM. In addition, depression and potential for application of FGFET devices to neural networks were analyzed. The temperature-dependent characteristics of the TCAM and FA circuits with FGFETs were analyzed as an indicator of energy and delay time, and the appropriate number of CSBs should be applied.

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Section: Introductionmentioning

confidence: 99%

Analyzing Various Structural and Temperature Characteristics of Floating Gate Field Effect Transistors Applicable to Fine-Grain Logic-in-Memory Devices

Cho,

Kim,

Kang

et al. 2024

Micromachines

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“…In this study, we investigated a device that can function as a non-volatile memory device called the scalable two transistor memory (STTM) and phase-state low electronnumber drive random access memory (PLEDM) and its applicability to a LiM system [19][20][21][22][23][24]. STTM and PLEDM devices were announced from Samsung Electronics and Hitachi Corporation, respectively, and were used to replace the dynamic random access memory.…”

Section: Introductionmentioning

confidence: 99%

Investigation on floating-gate field-effect transistor for logic-in-memory application

Kim,

Cho,

Choi

et al. 2023

J. Phys. D: Appl. Phys.

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In this paper, we present analysis results on the applicability of a previously introduced memory device, floating-gate field-effect transistor (FGFET), to a logic-in-memory system for the first time. Device optimization and compact modeling were performed using a well-calibrated technology computer-aided design (TCAD) model and the results of applying logic-in-memory circuits were arranged. Device optimization in the 32 nm technology node was conducted by assessing the device performance in terms of memory window, retention time, and write speed. After device optimization, the operational characteristics were analyzed by applying the proposed compact model to a full adder (FA) circuit and a ternary content addressable array memory (TCAM) circuit with logic-in-memory characteristics. Compared to FA and TCAM circuits composed of conventional FETs, the FGFET-based circuits demonstrated superior performance in terms of area and operating characteristics, implying that they offer significant potential for applications in silicon-based logic-in-memory technology.

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“…The FGFET structure is based on the device structure named STTM (Scalable Two Transistor Memory) and PLEDM (Phase-state Low Electron-number Drive Random Access Memory) announced by Samsung Electronics and Hitachi. [16][17][18][19][20][21] The floating node that stores the data is placed on the gate stack of a general MOSFET, and the data writing function is performed by applying the data line voltage (VDL) and the word line voltage (VWL). In this work, FGFET is applied to the most scaled-down 32nm technology node in the single gate planar MOSFET logic process to show LiM device characteristics, develop a compact model for FGFET that can be described in a circuit simulator, and perform various full adder circuit ananlyzes that is applied LiM technology.…”

Section: Introductionmentioning

confidence: 99%

Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET)

Kim,

Choi,

Cho

et al. 2023

IEEE Access

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The high data throughput and high energy efficiency required recently are increasingly difficult to implement due to the von Neumann bottleneck. As a way to overcome this, Logic-in-Memory (LiM) technology has recently been receiving a lot of attention. In particular, since the addition function is important to solve high data throughput in applications such as artificial intelligence, the results of applying various fine-grain LiM application devices to full adder circuit design are being announced. In this paper, a Floating Gate Field Effect Transistor (FGFET), which has a structure similar to a floating gate memory cell transistor that has been widely used in the past and is highly applicable to mass production, was applied to the LiM application circuit design. Prior to application to circuit design, the FGFET characteristics were confirmed using a well-calibrated technology computer-aided design (TCAD) simulation at the 32nm technology node, and a compact model was developed to describe them. Afterwards, the delay and power consumption were evaluated with three different types of FGFET-based full adder circuits, and benchmarked with conventional CMOS (complementary metal-oxied-semiconductor)based conventional full adder circuits.

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Characterization of multi-barrier tunneling diodes and vertical transistors using 2-D device simulation

Cited by 3 publications

References 5 publications

Analyzing Various Structural and Temperature Characteristics of Floating Gate Field Effect Transistors Applicable to Fine-Grain Logic-in-Memory Devices

Analyzing Various Structural and Temperature Characteristics of Floating Gate Field Effect Transistors Applicable to Fine-Grain Logic-in-Memory Devices

Investigation on floating-gate field-effect transistor for logic-in-memory application

Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET)

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