Characterization of Random Telegraph Noise Generated by Process- and Cycling-Stress-Induced Traps in 26 nm NAND Flash Memory

Abstract

We characterized normalized noise power density (S I/I BL 2) and bit-line (BL) current fluctuation (ΔI BL) using traps generated applying cycling stress in 26 nm NAND flash memory. The ΔI BL, S I/I BL 2, and capture (τc) and emission times (τe) of random telegraph noise (RTN) were measured before and after cycling stress, respectively. With cycling stress, traps were generated, and S I/I BL 2 and ΔI BL were increased significantly. The τc and τe of RTN after cycling stress are similar with to those before cycling stress. RTN was characterized in terms of the trap position in the three-dimensional space (x T, y T, and z T) of the tunneling oxide and trap energy (E T). three-dimensional technology computer-aided design (TCAD) simulation was used to determine the position of z T through the effect of adjacent BL cells.