Characterizing a Neutron-Induced Fault Model for Deep Neural Networks

Abstract

The reliability evaluation of Deep Neural Networks (DNNs) executed on Graphic Processing Units (GPUs) is a challenging problem since the hardware architecture is highly complex and the software frameworks are composed of many layers of abstraction. While software-level fault injection is a common and fast way to evaluate the reliability of complex applications, it may produce unrealistic results since it has limited access to the hardware resources and the adopted fault models may be too naive (i.e., single and double bit flip). Contrarily, physical fault injection with neutron beam provides realistic error rates but lacks fault propagation visibility. This paper proposes a characterization of the DNN fault model combining both neutron beam experiments and fault injection at software level. We exposed GPUs running General Matrix Multiplication (GEMM) and DNNs to beam neutrons to measure their error rate. On DNNs, we observe that the percentage of critical errors can be up to 61%, and show that ECC is ineffective in reducing critical errors. We then performed a complementary software-level fault injection, using fault models derived from RTL simulations. Our results show that by injecting complex fault models, the YOLOv3 misdetection rate is validated to be very close to the rate measured with beam experiments, which is 8.66× higher than the one measured with fault injection using only single-bit flips.

Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives

“…7) Radiation experiments: Experiences from radiation experiments on different GPUs running different DNN models are described in [81]- [84]. In [81], FIT rates are scaled to natural terrestrial environment.…”

“…[245]-[249] Redundancy-based [77], [85], [91], [101], [104], [250]- [256] Fault masking [91], [92], [257], [258], [259], [260], [261] Variation-aware mapping for memristor crossbar arrays [262], [263] ECC [81], [83], [84], [264] ML-based [265] Adaptive training after testing [146], [266] Razor [257], [267], [268] Neuron adaptation [269] Aging-aware on-line training of memristor crossbar arrays [270],…”

“…Traditional fault tolerance methods continue to play critical roles in AI hardware. For example, ECC is used to protect the memories of AI hardware accelerators [81], [83], [84], [264]. The Razor technique [278], aiming at detecting and correcting circuit timing errors, is also used in some AI hardware accelerator designs [257], [267], [268].…”