Characterizing post-exposure bake processing for transient- and steady-state conditions in the context of critical dimension control

Steele, David A.; Coniglio, Anthony; Tang, Cherry; Singh, Bhanwar; Nip, Steve; Spanos, Costas J.

doi:10.1117/12.473491

Cited by 30 publications

(26 citation statements)

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“…versus : there exist systematic variations. To reject , we choose the smallest spatial sample variance (11) as the test base and test if all the rest of the spatial sample variances are equal to Since is used as the comparison base, only the one-sided test is required. Let denote the critical value of the Chi-square distribution with degrees of freedom and the type I error probability .…”

Section: Identification Of Systematic Variationsmentioning

confidence: 99%

“…Significance of the components can be then ranked for further causal analysis. At the process level, Steele et al [11] assume the total critical dimension (CD) variation to be the combination of independent variance components from coating, developing, and baking processes and use design of experiments to model and understand the CD uniformity issues. Yu et al [12] employ the fast Fourier transform (FFT) to decompose the wafer CD's spatial variations into wafer spatial patterns or residual variations.…”

Section: Introductionmentioning

confidence: 99%

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Spatial Variance Spectrum Analysis and Its Application to Unsupervised Detection of Systematic Wafer Spatial Variations

Blue

Chen

2011

IEEE Trans. Automat. Sci. Eng.

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Investigation of wafer spatial variations is critical for semiconductor process/equipment optimization and circuit design. The objective of spatial variation study is to differentiate the systematic variation component from the random component. This is usually done by contrasting with a set of known systematic patterns based on engineering knowledge. However, there could exist unknown systematic components remaining in the unexplained residuals and overlooked by the conventional spatial variation study. In this paper, we develop a novel spatial variance spectrum ( ) to analyze the systematic variations without any priori information of the systematic patterns. The is a series of spatial variations over a range of spatial moving window sizes from the smallest spatial moving window consisting of only two metrology sites to the largest one covering all metrology sites of the entire wafer. The can be used to characterize the wafer spatial variations and to detect existence of systematic variations by a proposed hypothesis test. We also propose an index to summarize from the the systematic proportion of the spatial variation. The proposed test and index of systematic variations will be demonstrated and validated through both hypothetical examples and actual cases of wafer critical dimension (CD) metrology data.Note to Practitioners-Wafer spatial variations study is critical to within-wafer control and optimization. Only through investigation of the spatial variations on the wafer surface do we get to learn more about the nature of the semiconductor process/equipment and the manufacturability of certain circuit design patterns. In this paper, we propose a novel analysis tool to help engineers characterize the wafer spatial variations and distinguish the systematic variation from the random variation. With the spatial systematic variations identified and described, the engineers can discover the opportunities to further improve the processing quality and thus the final yield.

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Section: Identification Of Systematic Variationsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Spatial Variance Spectrum Analysis and Its Application to Unsupervised Detection of Systematic Wafer Spatial Variations

Blue

Chen

2011

IEEE Trans. Automat. Sci. Eng.

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“…For example, Sturtevant et al [11] reports a 9% variation in CD per 1% variation in temperature for a deep ultraviolet resist. A number of recent investigation also shows the importance of proper bakeplate operation on CD control [14], [15], [16].…”

Section: B Thermal Processingmentioning

confidence: 99%

Integrated metrology and processes for semiconductor manufacturing

Tay

Lim³

et al. 2005

31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005.

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The 2003 International Technology Road map for Semiconductors, stated under the Section Grand Challenges that real-time in-situ, integrated, and in-line metrology is required for manufacturing. The 2003 report of the international panel on future directions in control, dynamics and systems has identified that the use of control is critical to future progress in the semiconductor sectors. Modeling plays a crucial role and control techniques must make use of increase in-situ measurements to control at a variety of temporal and spatial scales. This paper gives two examples of research on integrated metrology and processes that address some of the challenges. An integrated bake/chill/spin module and in-situ metrology for photoresist thickness will be discussed.

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“…In [1], David's group characterized PEB as a photo-acid activation process in a self-catalyzing sequence. The organic compounds of resist would break up, making it soluble in the developer solution.…”

Section: Introductionmentioning

confidence: 99%

Development of in-situ real-time CD monitoring and control system through PEB process

Geng

Tay

2012

2012 24th Chinese Control and Decision Conference (CCDC)

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Real-time control is the trend for photoresist processing in the advanced lithography. In this paper we develop an in-situ ellipsometer integrated with a programmable thermal heating system, which could perform real-time monitoring and control for critical dimension (CD) latent image through the entire post-exposure bake (PEB) process. The inline ellipsometry measurements are fitted into an electromagnetic wave model built on the rigorous coupled-wave analysis (RCWA) theory for CD latent image characterization. Thereafter a real-time control scheme is proposed by applying the programmable thermal bake-plate. The experimental outcome demonstrates a significant improvement on the final CD result comparing to the conventional baking method.

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Characterizing post-exposure bake processing for transient- and steady-state conditions in the context of critical dimension control

Cited by 30 publications

References 0 publications

Spatial Variance Spectrum Analysis and Its Application to Unsupervised Detection of Systematic Wafer Spatial Variations

Spatial Variance Spectrum Analysis and Its Application to Unsupervised Detection of Systematic Wafer Spatial Variations

Integrated metrology and processes for semiconductor manufacturing

Development of in-situ real-time CD monitoring and control system through PEB process

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