Charge-domain integrated circuits for signal processing

Vogelsong, T. L.; Tiemann, J.J.; Steckl, A. J.

doi:10.1109/jssc.1985.1052344

Cited by 11 publications

(3 citation statements)

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“…if FB= I then x else x (2) so that the essence ofthe operation is the signal inversion. Thus, for CDL implementation we redefine a logic value by a pair of charge packets, (p, q) as: logic "true" or "1" by (p = empty, q= full), logic "false" or "0" by (p = full, q= empty).…”

Section: Charge Binningmentioning

confidence: 99%

“…This is why the charge transfer operations require MOSFET type device structure which allows charge transfer within a piece of silicon chip. The first successful application of charge-domain operation was a simple charge transfer found in CCD (Charge Coupled Device) image sensing devices [1], and there were some attempts of applying CCD structures or, more in general, charge-domain operations to filters [2], [3], [4], [6] and computation intensive applications [5].…”

Section: Introductionmentioning

confidence: 99%

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An Attempt Towards Charge-Domain Logic (CDL)

Itoh

Yamazaki

Nakamura

et al. 2007

2007 41st Annual Conference on Information Sciences and Systems

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Application examples of charge-domain logic are described. To investigate the characteristics and possibilities of charge-domain logic, prototype implementations are made for full adder and CRC checker designs by standard CMOS, and fabricated by MOSIS 1.5u, double overlapping poly, and double metal technology. Those application designs require less than 8 steps of charge transfer so that no special fabrication process is required. Some of the results from evaluation experiment for both designs are also included.

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Section: Charge Binningmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

An Attempt Towards Charge-Domain Logic (CDL)

Itoh

Yamazaki

Nakamura

et al. 2007

2007 41st Annual Conference on Information Sciences and Systems

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“…In the course of effecting the preprocessing tasks, each 4. Prospects for spatially parallel image plane pixel may undergo as many as 100 to 500 simple arithmetic preprocessing operations per frame.…”

Section: Charge-coupled-computing Circuits 3 Prototype Charge-couplementioning

confidence: 99%

Charge-Coupled Computing For Focal Plane Image Preprocessing

Fossum

1987

Opt. Eng

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A new class of charge-coupled devices called charge-coup led computing devices is described. These analog circuits perform arith Columbia University Department of Electrical Engineering metic functions such as addition, subtraction, and magnitude com parison in the charge domain. The circuits are compact and are designed 1312 Seeley W. Mudd Building to be insensitive to rail voltages, simplifying their utilization. These 520 W. 120th Street devices, in conjunction with input, output, and analog memory circuits, New York, New York 10027 can be combined to form a simple but general-purpose and fully pro grammable charge-coupled computer. A prototype charge-coupled com puter has been fabricated and tested. Prospects for forming a large array of computers (e.g., 1000 to 10,000) on a single chip for spatially parallel image preprocessing are discussed. Such image plane preprocessing of data would find use in real-time mobile robot vision systems, in which low power, lightweight computing is critical for economical viability.

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