Charge pump with perfect current matchingcharacteristics in phase-locked loops

Abstract

Conventional CMOS charge pump circuits have some current mismatching characteristics. The current mismatch of the charge pump in the PLLs generates a phase offset, which increases spurs in the PLL output signals. In particular, it reduces the locking range in wide range PLLs with a dual loop scheme. A new charge pump circuit with perfect current matching characteristics is proposed. By using an error amplifier and reference current sources, one can acheve a charge pump with good current matching characteristics. It shows nearly perfect current matching characteristics over the whole VCO input range, and the amount of the reference spur is < -75dBc in the PLL output signal. The charge pump circuit is implemented in a 0 . 2 5~ CMOS process.Introduction: A charge pump is widely used in modem phaselocked loops (PLL) for a low cost IC solution. Having a neutral state, an ideal charge pump combined with a phase/frequency detector (PIFD) provides an infinite DC gain with passive filters, which results in the unbounded pull-in range for second and higher order PLLs if not limited by the voltage controlled oscillator (VCO) input range [l]. As long as the P E D and the charge pump are ideal, zero static phase error can be obtained. The charge pump, in general, shows nonideal characteristics when implemented in a circuit and its practical issues need to be considered in the design of the PLLs. One of the issues in the charge pump design is the current mismatch. In this Letter we consider the effects of the phase offset caused by the current mismatch and propose a new charge pump circuit with nearly perfect current matching characteristics. VDD M I up-ri M2 l l e c 1 12 'I REF 1 I' 0 VDD CPOUT p J

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