2008 International Conference on Field Programmable Logic and Applications 2008
DOI: 10.1109/fpl.2008.4629927
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CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures

Abstract: This paper describes CHiMPS, a C-based accelerator compiler for hybrid CPU-FPGA computing platforms. CHiMPS's goal is to facilitate FPGA programming for highperformance computing developers. It inputs generic ANSI-C code and automatically generates VHDL blocks for an FPGA. The accelerator architecture is customized with multiple caches that are tuned to the application. Speedups of 2.8x to 36.9x (geometric mean 6.7x) are achieved on a variety of HPC benchmarks with minimal source code changes.

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Cited by 50 publications
(35 citation statements)
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“…The CHiMPS compiler [38] targets applications for highperformance. The distinctive feature of CHiMPS is its manycache, which is a hardware model that adapts the hundreds of small, independent FPGA memories to the specific memory needs of an application.…”
Section: A Academic Hls Tools Evaluated In This Studymentioning
confidence: 99%
“…The CHiMPS compiler [38] targets applications for highperformance. The distinctive feature of CHiMPS is its manycache, which is a hardware model that adapts the hundreds of small, independent FPGA memories to the specific memory needs of an application.…”
Section: A Academic Hls Tools Evaluated In This Studymentioning
confidence: 99%
“…Delft No Trident [38] Los Alamos NL No CHiMPS [35] U. Washington No Kiwi [18] U. Cambridge Yes gcc2verilog [21] U. Korea No HercuLeS [27] Ajax Compiler No a Refers to array partitioning as part of the tool flow, the arrays can always be re-written into multiple partitions by the software designer.…”
Section: Memory Partitioning In Hlsmentioning
confidence: 99%
“…[19] used distributed caches, but did not address coherency at all. This was treated in [23], but with more complex hardware (due to combined read/write ports), and lack of separate coherence clusters and cache-to-cache transfers.…”
Section: Related Workmentioning
confidence: 99%
“…No explicit coherency management between them is required. Potentially dependent accesses are assigned to Cache Ports in the same Cluster, with explicit coherency mechanisms (in contrast to, e.g., [19], which provided only incoherent caches).…”
Section: Coherency Mechanismsmentioning
confidence: 99%