CIDR: A Cost-Effective In-Line Data Reduction System for Terabit-Per-Second Scale SSD Arrays

Ajdari, Mohammadamin; Park, Pyeongsu; Kim, Joonsung; Kwon, Dongup; Kim, Jangwoo

doi:10.1109/hpca.2019.00025

Cited by 18 publications

(10 citation statements)

References 18 publications

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“…In-Storage Processing Systems. Prior works explore in-storage processing in the form of application-specific accelerators [143,[190][191][192][193][194][195][196], general-purpose processing inside storage devices [195][196][197][198][199][200][201], SSDs closely integrated with FPGAs [142,[202][203][204][205][206], or SSDs closely integrated with GPUs [207]. Several works propose techniques for general pattern matching in storage [208,209] without a specific focus on read mapping nor support for different sequencing read types and data structures.…”

Section: Related Workmentioning

confidence: 99%

GenStore: a high-performance in-storage processing system for genome sequence analysis

Ghiasi

Park

Mustafa

et al. 2022

Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

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of read mapping processes of reads with different properties and degrees of genetic variation, we meticulously design low-cost hardware accelerators and data/computation flows inside a NAND flashbased solid-state drive (SSD). Our evaluation using a wide range of real genomic datasets shows that GenStore, when implemented in three modern NAND flash-based SSDs, significantly improves the read mapping performance of state-of-the-art software (hardware) baselines by 2.07-6.05× (1.52-3.32×) for read sets with high similarity to the reference genome and 1.45-33.63× (2.70-19.2×) for read sets with low similarity to the reference genome. CCS CONCEPTS• Computer systems organization → Special purpose systems;• Hardware → External storage.

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Section: Related Workmentioning

confidence: 99%

GenStore: a high-performance in-storage processing system for genome sequence analysis

Ghiasi

Park

Mustafa

et al. 2022

Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

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“…Also, activate feature compatibility enables smooth interoperability adjustments [20]. This 224.0.0.9 address is at the address IP version 4 class D. RIPv2 is the STD-56 Internet Standard [21].…”

Section: Ripv2mentioning

confidence: 99%

Performance analysis routing protocol between RIPv2 and EIGRP with termination test on full mesh topology

Prehanto

Indriyanti

Permadi³

2021

IJEECS

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<span>Data access on a company is a very important part of an institution or a college. Especially in the present time, the internet has become an important thing in human life. With the existence of certain means there is a problem that will arise, needed solution or way out on a network that can be called protocol. Because an institution needs to choose network methods properly and safely.This study focuses on addressing the path/route of data packets to be sent will be governed by this routing protocol in the form of table routing. Routing used adip RIPv2 with EIGRP which will be compared on both routing protocol which is better against predetermined situation previous.The result of the research using CISCO Packet Tracer 7.10 software shows that EIGRP routing run on two topologies has faster convergence time speed with an average time of 0.01 - 0.02 seconds as well as the change of its routing table at once. Unlike RIPv2 routing that takes longer than EIGRP routing is with the time range from 0.01 to 0.19. </span>

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“…Software-based approaches used to offer more flexibility at the cost of performance. Research into approaches using FPGAs such as CIDR might allow hardware-accelerated deduplication without sacrificing flexibility [6].…”

Section: Deduplicationmentioning

confidence: 99%

State of the Art and Future Trends in Data Reduction for High-Performance Computing

2020

JSFI

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Research into data reduction techniques has gained popularity in recent years as storage capacity and performance become a growing concern. This survey paper provides an overview of leveraging points found in high-performance computing (HPC) systems and suitable mechanisms to reduce data volumes. We present the underlying theories and their application throughout the HPC stack and also discuss related hardware acceleration and reduction approaches. After introducing relevant use-cases, an overview of modern lossless and lossy compression algorithms and their respective usage at the application and file system layer is given. In anticipation of their increasing relevance for adaptive and in situ approaches, dimensionality reduction techniques are summarized with a focus on non-linear feature extraction. Adaptive approaches and in situ compression algorithms and frameworks follow. The key stages and new opportunities to deduplication are covered next. An unconventional but promising method is recomputation, which is proposed at last. We conclude the survey with an outlook on future developments.

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CIDR: A Cost-Effective In-Line Data Reduction System for Terabit-Per-Second Scale SSD Arrays

Cited by 18 publications

References 18 publications

GenStore: a high-performance in-storage processing system for genome sequence analysis

GenStore: a high-performance in-storage processing system for genome sequence analysis

Performance analysis routing protocol between RIPv2 and EIGRP with termination test on full mesh topology

State of the Art and Future Trends in Data Reduction for High-Performance Computing

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