Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module

Warnock, J.; Chan, Yuen; Harrer, H.; Carey, Seán; Salem, G.; Malone, Daniel G.; Puri, Ruchir; Zitz, Jeffrey A.; Jatkowski, Adam; Strevig, Gerald; Datta, Ayan; Gattiker, A.; Bansal, Aditya; Mayer, G.; Chan, Yiu-Hing; Mayo, M.; Rude, D.; Sigal, L.; Strach, Thomas; Smith, H.; Wen, Huajun; Mak, P.; Shum, C-L Kevin; Plass, D.; Webb, Charles F.

doi:10.1109/jssc.2013.2284647

Cited by 26 publications

(14 citation statements)

References 9 publications

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“…Warnock et al [89] discuss a circuit and physical design of the zEnterprise EC12 Microprocessor chips and multi-chip module. This is a processor chip (CP), level-4 cache chip (SC) and the multi-chip module at the heart of the EC12 system.…”

Section: Energy Saving Chipsmentioning

confidence: 99%

A Survey of Emerging Architectural Techniques for Improving Cache Energy Consumption

Bhebhe

Agyeman

2016

CAE

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Abstract-The search goes on for another ground breaking phenomenon to reduce the ever-increasing disparity between the CPU performance and storage. There are encouraging breakthroughs in enhancing CPU performance through fabrication technologies and changes in chip designs but not as much luck has been struck with regards to the computer storage resulting in material negative system performance. A lot of research effort has been put on finding techniques that can improve the energy efficiency of cache architectures. This work is a survey of energy saving techniques which are grouped on whether they save the dynamic energy, leakage energy or both. Needless to mention, the aim of this work is to compile a quick reference guide of energy saving techniques from 2013 to 2016 for engineers, researchers and students.

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Section: Energy Saving Chipsmentioning

confidence: 99%

A Survey of Emerging Architectural Techniques for Improving Cache Energy Consumption

Bhebhe

Agyeman

2016

CAE

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“…The IBM z13* processor subsystem introduces a significant change in electronic packaging when compared to the previous generations of high-end z Systems*Vthe IBM zEnterprise* 196 (z196) [1] and the IBM zEnterprise EC12 (zEC12) [2] Vwhile maintaining the system of 24 processor chips interconnected with an SMP (symmetric multiprocessor) fabric. However, the electronic packaging has been significantly upgraded to increase performance while reducing production cost.…”

Section: Introductionmentioning

confidence: 99%

Electronic packaging of the IBM z13 processor drawer

et al. 2015

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“…The previous generation design, the IBM zEnterprise* EC12 (zEC12) [1][2][3] also relied on two chips, a processor chip and an L4 (Level 4) cache chip, both in 32-nm technology, with 2.7 and 3.3 billion transistors, respectively. The z13 design makes use of the improved density of the 22-nm technology and larger chip areas to greatly increase the overall device count and chip functionality, with about 4 and 7.1 billion transistors on the CP (Central Processor) and SC (System Controller) chips, respectively.…”

Section: Introductionmentioning

confidence: 99%