Circuit Design Advances for Wireless Sensing Applications

Chen, Gregory; Hanson, Scott; Blaauw, David; Sylvester, Dennis

doi:10.1109/jproc.2010.2053333

Cited by 66 publications

(46 citation statements)

References 62 publications

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“…We consider the same block diagram for the RF circuitry introduced in [10], a model which is well accepted in the literature and is still up to date, as shown in [8]. For the transmitting circuitry, the following components are included: digital-to-analog converter, mixer, transmit filters and frequency synthesizer and the respective power consumptions are: P DAC , P mix , P f il tx and P syn , totalizing the consumed power for the transmitting circuitry as…”

Section: System Modelmentioning

confidence: 99%

Energy efficiency of some non-cooperative, cooperative and hybrid communication schemes in multi-relay WSNs

et al. 2013

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In this paper we analyze the energy efficiency of single-hop, multihop, cooperative selective decode-and-forward, cooperative incremental decodeand-forward, and even the combination of cooperative and non-cooperative schemes, in wireless sensor networks composed of several nodes. We assume that, as the sensor nodes can experience either non line-of-sight or some lineof-sight conditions, the Nakagami-m fading distribution is used to model the wireless environment. The energy efficiency analysis is constrained by a target outage probability and an end-to-end throughput. Our results show that in most scenarios cooperative incremental schemes are more energy efficient than the other methods.

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Section: System Modelmentioning

confidence: 99%

Energy efficiency of some non-cooperative, cooperative and hybrid communication schemes in multi-relay WSNs

et al. 2013

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“…A representative model for the RF circuitry is given in [10], illustrated by Figure 6, which represents the state of the art for current hardware for sensor technologies, as also depicted in [9]. From the figure, the following components can be identified for the transmit circuit: digital-to-analog converter, mixer, transmission filter and frequency synthesizer, with the respective power consumptions given by P DAC , P mix , P fil tx and P syn , totalizing: P TX = P DAC + P mix + P fil tx + P syn .…”

Section: Conceptsmentioning

confidence: 99%

“…The wireless throughput has grown by roughly one million times and the computational capacity has had an increase of 40 million times since 1957, while the average nominal battery capacity has increased only 3.5 percent per year over the last two decades, as shown in [11,24]. Thus, according to [9], due to these power source limitations, the overall energy consumption and energy efficiency have great importance and are major concerns in the design and analysis of wireless sensor networks.…”

Section: Introductionmentioning

confidence: 99%

Energy Efficiency in Cooperative Wireless Sensor Networks

Brante¹,

Kakitani²,

Souza³

2012

Energy Efficiency - The Innovative Ways for Smart Energy, the Future Towards Modern Utilities

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“…Since radio devices usually dominate the power consumption of the system [2], in biomedical or physiological monitoring, the sensor data at each node should be preprocessed before transmission [3]. In particular, biomedical sensors in the IoT targets an important application of the "unmanned medical nursing system" [1], which could alleviate increasing medical costs as the baby boomers enter retirement [4].…”

Section: Introductionmentioning

confidence: 99%

Hardware-Efficient Delta Sigma-Based Digital Signal Processing Circuits for the Internet-of-Things

Liu

Furth

Tang

2015

JLPEA

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This paper presents hardware-efficient Delta Sigma linear processing circuits for the next generation low-power VLSI devices in the Internet-of-things (IoT). We first propose the P-N (positive-negative) pair method to manipulate both the analog value and length of a first-order Delta Sigma bit sequence. We then present a binary counter method. Based on these methods, we develop Delta Sigma domain on-the-fly digital signal-processing circuits: the Delta Sigma sum adder, average adder and coefficient multiplier. The counter-based average adder can work with both first-order and higher-order Delta Sigma modulators and can also be used as a coefficient multiplier. The functionalities of the proposed circuits are verified by MATLAB simulation and FPGA implementation. We also compare the area and power between the proposed Delta Sigma adders and a conventional multi-bit adder by synthesizing both circuits in the IBM 0.18-µm technology. Synthesis results show that the proposed Delta Sigma processing circuits can extensively reduce circuit area and power. With 100 inputs, a Delta Sigma average adder saves 94% of the silicon area and 96% of the power compared to a multi-bit binary adder. The proposed circuits have the potential to be widely used in future IoT circuits.

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Circuit Design Advances for Wireless Sensing Applications

Cited by 66 publications

References 62 publications

Energy efficiency of some non-cooperative, cooperative and hybrid communication schemes in multi-relay WSNs

Energy efficiency of some non-cooperative, cooperative and hybrid communication schemes in multi-relay WSNs

Energy Efficiency in Cooperative Wireless Sensor Networks

Hardware-Efficient Delta Sigma-Based Digital Signal Processing Circuits for the Internet-of-Things

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