Clean-Induced Instability of Electrical Characteristics in Poly-Si Junctionless Nanowire Transistor

Abstract

A heavy doped poly-Si junctionless channel immersed in NH4OH/H2O2/H2O (SC1) solution is always unexpectedly damaged and results in an instable electrical characteristic in a proposed tri-gated nanaowire (NW) thin film transistor (TFT). A new finding indicates that a sharp nanowire profile is observed because some segregated precipitates at the poly-Si grain boundaries are etched and the dependence of the silicon etch rate on the crystal orientation/grain size also impacts the sharp corner formation in SC1 solution. Moreover, it results in damaged nanowire surface and many electron traps in subsequently deposited gate oxide. Therefore, a smaller etching amount in SC1 solution is suggested in the fabrication of a tiny poly-Si junctionless nanowire TFT.