CMOS analog integrated circuits based on weak inversion operations

Vittoz, E.A.; Fellrath, J.

doi:10.1109/jssc.1977.1050882

Cited by 701 publications

(218 citation statements)

References 13 publications

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“…In run mode however, when the implemented system is used for computation and processing on the FPAA, the temperature could vary based on the application, for example in wearable systems [3,4,12] or as a sensory node for analyzing speech [4]. A subthreshold current reference circuit, similar to a conventional current reference circuit [21], shown in the Figure 6 would bias the gate of a pFET which would reduce the temperature variation of the output current to 12.0%. The biasing current is constant and is not programmable unless W of its transistor and the resistor values are changed.…”

Section: Reducing Temperature Dependence In Programmable Circuits Andmentioning

confidence: 99%

Implementation Of Computational Blocks For Array Based Systems And Crickets Using Temperature Variability Techniqiue

2018

IJRTER

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This paper investigates the variability of various circuits and systems over temperature and presents several methods to improve their performance over temperature. The work demonstrates use of large scale reconfigurable System-On-Chip (SOC) for reducing the variability of circuits and systems compiled on a Floating Gate (FG) based Field Programmable Analog Array (FPAA). Temperature dependencies of circuits are modeled using an open-source simulator built in the Scilab/XCOS environment and the results are compared with measurement data obtained from the FPAA. This comparison gives further insight into the temperature dependence of various circuits and signal processing systems and allows us to compensate as well as predict their behavior. Also, the work presents several different current and voltage references that could help in reducing the variability caused due to changes in temperature. These references are standard blocks in the Scilab/Xcos environment that could be easily compiled on the FPAA. An FG based current reference is then used for biasing a 12 × 1 Vector Matrix Multiplication (VMM) circuit and a second order Gm − C bandpass filter to demonstrate the compilation and usage of these voltage/current reference in a reconfigurable fabric. The large scale FG FPAA presented here is fabricated in a 350 nm CMOS process.

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Section: Reducing Temperature Dependence In Programmable Circuits Andmentioning

confidence: 99%

Implementation Of Computational Blocks For Array Based Systems And Crickets Using Temperature Variability Techniqiue

2018

IJRTER

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“…2(b) with the design approach adapted from previous work on low-power crystal oscillators [30]. An automatic gain control (AGC) circuit [11,31] is added to minimize the power consumption by setting the transconductance, gm, at the critical point. The AGC circuitry also helps prevent driving the MEMS resonator into the non-linear regime.…”

Section: A Double-ended Tuning Forkmentioning

confidence: 99%

Vacuum Packaged Low-Power Resonant MEMS Strain Sensor

Erbes

Yan

et al. 2016

J. Microelectromech. Syst.

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Abstract-This paper describes a technical approach towards the realization of a low-power temperature-compensated micromachined resonant strain sensor. The sensor design is based on two identical and orthogonally-oriented resonators where the differential frequency is utilized to provide an output proportional to the applied strain with temperature compensation achieved to first order. Interface circuits comprising of two front-end oscillators, a mixer and low-pass filter are designed and fabricated in a standard 0.35µm CMOS process. The characterized devices demonstrate a scale factor of 2.8Hz/µε over a strain range of 1000µε with excellent linearity over the measurement range. The compensated frequency drift due to temperature is reduced to 4% of the uncompensated value through this scheme. The total continuous power consumption of the strain sensor is 3µW from a 1.2V supply. This low power implementation is essential to enable battery-powered or energy harvesting enabled monitoring applications.

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“…These topologies need very low power supply voltage which are appropriate for transistors with finer geometry. Furthermore, it's exponential behavior in weak inversion (similar to Bipolar) can be exploited for non-linear analog preprocessing required for mapping the signal to lower bandwidth feature spaces [36]. The matching and modelling errors typical in subthreshold circuits are absorbed in the adaptive classifier.…”

Section: Fifth Insetmentioning

confidence: 99%

Where Analog Meets Digital: Analog?to?Information Conversion and Beyond

Verhelst

Bahai

2015

IEEE Solid-State Circuits Mag.

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Energy efficiency, long battery life and low latency are some of the key attributes of many emerging ultralow power sensing and monitoring systems. Applications such as always-on reactive sensor systems for natural human-device interfaces and IoT for consumer and industrial applications require ultra-low power designs beyond the promises of state of the art data converters.These devices demand for a new approach to analog-digital system partitioning with the goal of significant overall reduction in energy consumption. Many IoT applications, unlike most multimedia systems, require signal information extraction or signature extraction, rather than full reconstruction of the original sensed waveforms. Under these conditions, Nyquist rate sampling may no longer offer the optimal digitization scheme. Recent work on alternative sensor digitization strategies target drastic sampling rate reduction in the ADC, while preserving the valuable relevant information (knowledge) present in the sensed signal. This paper aims to give an overview of this emerging field of analog-to-information conversion in light of various sub-Nyquist sampling techniques recently appearing in literature, as well as highlight new opportunities, challenges and applications emerging by such converters. I.Nyquist rate vs. Information rate: Over the last several decades, a growing number of signal processing architects have embraced intensive digital signal processing preceded by a standard analog frontend and analog-to-digital converter. This trend has been exacerbated by the exponential rate of miniaturization in silicon, growing complexity of signal processing algorithms, and more systematic digital design and technology porting compared to analog design in deep submicron technology nodes. The interface between analog and digital signals has as such generally been governed by sampling at or above the Nyquist sampling rate of the analog waveforms. The dimensionality of a bandlimited signal f(t) with a physical bandwidth W over a period of T is 2WT, indicating the number of samples sufficient for perfect digital signal reconstruction. Such sampling at the Nyquist rate of 2W ensures the integrity of the signal represented by samples which are Fourier series coefficients in a Fourier series expansion of function F(w) over fundamental interval [-W W] [1]. The original signal can subsequently be reconstructed by superimposing a set of orthogonal basis functions (sinc functions) weighted by the samples f(nT). Sampling the incoming signal at this rate hence guarantees that no information about the incoming signal is lost without taking into account any heuristic or a priori side information about the signal or its information content other than the physical bandwidth. While sampling at or above Nyquist rate offers a classic and straightforward approach, it can compromise overall power efficiency.

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CMOS analog integrated circuits based on weak inversion operations

Cited by 701 publications

References 13 publications

Implementation Of Computational Blocks For Array Based Systems And Crickets Using Temperature Variability Techniqiue

Implementation Of Computational Blocks For Array Based Systems And Crickets Using Temperature Variability Techniqiue

Vacuum Packaged Low-Power Resonant MEMS Strain Sensor

Where Analog Meets Digital: Analog?to?Information Conversion and Beyond

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