CMOS On-Chip Stable True-Random ID Generation Using Antenna Effect

Tang, Fang; Chen, Denis G.; Wang, Bo; Bermak, Amine; Amira, Abbes; Mohamad, Saqib

doi:10.1109/led.2013.2287514

Cited by 10 publications

(8 citation statements)

References 10 publications

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“…The energy consumption per bit for the parallel readout mode was used to be compared with other works. The work proposed by Tang et al [4] achieved the lowest energy consumption per bit, but a more advanced technology is used. [8] 50.00% Not Available 65 nm Su et al [2] 50.13% 1.6 pJ 180 nm Chen et al [1] 50.90% Not Available Not Available Lofstrom et al [9] Not Available 8330 pJ 350 nm Tang et al [4] 50.47% 1.2 pJ 180 nm Liu et al [3] 49.94% Not Available 65 nm…”

Section: Comparison With Other Workmentioning

confidence: 99%

On-chip ID generation for multi-node implantable devices using SA-PUF

Gao

Ghoreishizadeh

Yan

et al. 2017

2017 IEEE International Symposium on Circuits and Systems (ISCAS)

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This paper presents a 64-bit on-chip identification system featuring low power consumption and randomness compensation for multi-node bio-implantable devices. A sense amplifier based bit-cell is proposed to realize the silicon physical unclonable function, providing a unique value whose probability has a uniform distribution and minimized influence from the temperature and supply variation. The entire system is designed and implemented in a typical 0.35 µm CMOS technology, including an array of 64 bit-cells, readout circuits, and digital controllers for data interfaces. Simulated results show that the proposed bit-cell design achieved a uniformity of 50.24% and a uniqueness of 50.03% for generated IDs. The system achieved an energy consumption of 6.0 pJ per bit with parallel outputs and 17.3 pJ per bit with serial outputs.

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Section: Comparison With Other Workmentioning

confidence: 99%

On-chip ID generation for multi-node implantable devices using SA-PUF

Gao

Ghoreishizadeh

Yan

et al. 2017

2017 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…A different approach based on the measure of the data retention voltage of an SRAM is described in [21]. In [23] a PUC amplifying the difference in the threshold voltage of two NMOS is described; an approach very similar to [18], [20], [23] is described in [24] where the variations in the threshold voltage of MOSFETs are used to generate voltages that are mapped to 0 or 1 by a comparator made with two inverters; an approach based on Flash memory is proposed in [25]; [26] exploits the antenna effect in order to randomly break the gate oxide. The schemes based on uninitialized SRAM or latches [17], [18], [20] have the drawback that the underlying structure has two stable states and it can happen that the PUC ends in the "wrong" state.…”

Section: A Prior Workmentioning

confidence: 99%

“…Although the scheme of [26] is interesting because of its stability and low power consumption, it is suggested the overvoltage used to break the oxide could cause chip degradation [23].…”

Section: A Prior Workmentioning

confidence: 99%

Analytic and Simulation Results about a Compact, Reliable, and Unbiased 1-bit Physically Unclonable Constant

Bernardini

Rinaldo

2016

IEEE Trans.Inform.Forensic Secur.

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Abstract-Physically Unclonable Constants (PUC) are circuits used to embed unique secret bit-words in chips. We propose a simple PUC, with a complexity comparable with an SRAM cell. The proposed scheme is studied both theoretically and by means of simulations and it is shown that the proposed PUC is both unbiased and very stable. In particular, its intra-distance is predicted to be from 10 to 100 times smaller than competitor schemes. Simulations allow to conclude that the advantages of the proposed scheme are relevant enough to make it competitive even if the actual performance of a real implementation, not considered in this paper, will turn out to be an order of magnitude worse than predicted.

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“…However, a "afterburn" phase is performed to all broken oxides to enhance the stability, which would require additional hardware and calibration. In [15], the authors intentionally introduce oxide breakdown by violating antenna rules to generate stable random bits. However, the response time may be long due to the limited leakage current to charge the ID generation output if no breakdown occurs.…”

Section: Introductionmentioning

confidence: 99%

Implementation of stable PUFs using gate oxide breakdown

Wang

Yona

et al. 2017

2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)

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We implement and analyze highly stable PUFs using two random gate oxide breakdown mechanisms: plasma induced breakdown and voltage stressed breakdown. These gate oxide breakdown PUFs can be easily implemented in commercial silicon processes, and they are highly stable. We fabricated bit generation units for the stable PUFs on 99 testchips with 65nm CMOS bulk technology. Measurement results show that the plasma induced breakdown can generate complete stable responses. For the voltage stressed breakdown, the responses are with 0.12% error probability at a worst case corner, which can be effectively accommodated by taking the majority vote from multiple measurements. Both PUFs show significant area reduction compared to SRAM PUF. We compare methods for evaluating the security level of PUFs such as min-entropy, mutual information and guesswork as well as interand intra-FHD, and the popular NIST test suite. We show that guesswork can be viewed as a generalization of min-entropy and mutual information. In addition, we analyze our testchip data and show through various statistical distance measures that the bits are independent. Finally, we propose guesswork as a new statistical measure for the level of statistical independence that also has an operational meaning in terms of security.

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CMOS On-Chip Stable True-Random ID Generation Using Antenna Effect

Cited by 10 publications

References 10 publications

On-chip ID generation for multi-node implantable devices using SA-PUF

On-chip ID generation for multi-node implantable devices using SA-PUF

Analytic and Simulation Results about a Compact, Reliable, and Unbiased 1-bit Physically Unclonable Constant

Implementation of stable PUFs using gate oxide breakdown

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