CMOS RF Power Amplifiers for Mobile Communications

Reynaert, Patrick

doi:10.1002/9780470634455.ch13

Cited by 27 publications

(49 citation statements)

References 27 publications

(32 reference statements)

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“…The differential output stage also implies some additional aspects, besides the available double voltage swing, as each amplifier stage can utilize a lower power enhancement ratio [3,13] such that the efficiency can be higher than if a single-ended PA with a single L-match would have been used.…”

Section: Off-chip Matching Networkmentioning

confidence: 99%

“…This has recently triggered extensive studies to investigate the impact of different circuit techniques, design methodologies, and design tradeoffs on functionality of PAs in deep-submicron CMOS technologies [3]. Particularly, the demand for higher data rates in wireless communication has led to an increased interest in modulation schemes utilizing both phase and envelope modulation, necessitating a special focus on design issues for linear CMOS PAs to amplify signals with high Peak-to-Average-Power Ratio (PAPR), as in 802.11n WLAN.…”

Section: Introductionmentioning

confidence: 99%

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A 3.3 V 72.2 Mbit/s 802.11n WLAN transformer-based power amplifier in 65 nm CMOS

Fritzin

Alvandpour

2009

Analog Integr Circ Sig Process

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This paper describes the design of a power amplifier (PA) for 802.11n WLAN fabricated in 65 nm CMOS technology. The PA utilizes 3.3 V thick gate oxide (5.2 nm) transistors and a two-stage differential configuration with integrated transformers for input and interstage matching. A methodology used to extract the layout parasitics from electromagnetic (EM) simulations is described. For a 72.2 Mbit/s, 64-QAM, 802.11n OFDM signal at an average and peak output power of 11.6 and 19.6 dBm, respectively, the measured EVM is 3.8%. The PA meets the spectral mask up to an average output power of 17 dBm.

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Section: Off-chip Matching Networkmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A 3.3 V 72.2 Mbit/s 802.11n WLAN transformer-based power amplifier in 65 nm CMOS

Fritzin

Alvandpour

2009

Analog Integr Circ Sig Process

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“…RF Power Amplifier: is a key part of the RF frontend in any transmitter. PAs boost the signal power high enough such that it can propagate the required distance over the wireless medium [7]. …”

Section: Transmitter Architecture and Key Requirementsmentioning

confidence: 99%

Building Radio Frequency Transmitter for LTE User Equipment

Mansour¹,

Ghoname²,

Zekry³

2015

CAE

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Software defined radio implementation is required for LTE radio transceivers. An SDR consists of an RF front end and a digital processor platform DSP. This paper is devoted to the design and implementation of the front end which is divided into an active and a passive front end. The active front end consists of a frequency synthesizer, an I/Q modulator and an RF power amplifier while the passive front end includes the antenna and band pass filter. The paper presents the design, implementation, and testing of the LTE transmitter where the passive front end components are made of a microstrip circuits while the active components are selected from the off shelf components available in the semiconductor market.For this, the antenna and filter were printed using FR-4 substrate material with dielectric constant of ɛ r =4.4, thickness of h = 1.6 mm and loss tangent tan δ = 0.025.The frequency synthesizer is selected with step size of 200 KHz and frequency range from 0.37GHz to 5.7GHz, so that it covers all LTE bands.The selected direct conversion I/Q modulator has frequency range from 0.2GHz to 6GHz. It allows direct modulation of an RF signal using differential baseband I and Q signals.The selected RF Power Amplifier has two modes of operation, a high power mode (HPM) and low power mode (LPM).The PA achieves gain of about 25.5 dB and 14.5 dB in HPM and LPM respectively over the 60 MHz bandwidth from 1920MHz to 1980MHz.The performance of each component and the whole transmitter is measured using VNA (E8719A), EXA X-Series Signal Analyzer (N9010A), Agilent E8267D PSG Vector Signal Generator, and spectrum analyzer.

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“…The class-E power amplifier can ideally achieve 100% efficiency. This high efficiency has spurred many research interests on the design and analysis of Class-E Pas (Apostolidou, et al, 2009;Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002;Tsai, et al, 1999;Reynaert, 2006). The conventional class-E power amplifier can produce large power levels with good efficiency (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002.…”

Section: Introductionmentioning

confidence: 99%

“…The conventional class-E power amplifier can produce large power levels with good efficiency (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002. Most of the existing Class-E PA designs have been optimized to work at high output power levels, ranging from 23 to 33 dBm (Lee, et al 2010;Brama, et al, 2008;Mertens, et al, 2002;Tsai, et al, 1999;Reynaert, 2006;Mousa, 2013). If these fully integrated PAs are used in applications requiring low level output power such as wireless body sensor networks, the overall efficiency significantly degrades (Tan, et al, 2012).…”

Section: Introductionmentioning

confidence: 99%

Efficiency Analysis of Low Power Class-E Power Amplifier

Yousefi¹,

Koozehkanani²,

Sobhi³

et al. 2014

MAS

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This paper presents an analysis of effect of inductor and switch losses on output power and efficiency of low power class-E power amplifier. This structure is suitable for integrated circuit implementation. Since on chip inductors have large losses than the other elements, the effect of their losses on efficiency has been investigated. Equations for the efficiency have been derived and plotted versus the value of inductors and switch losses. Derived equations are evaluated using MATLAB. Also, Cadence Spectre has been used for schematic simulation. Results show a fair matching between simulated power loss and efficiency and MATLAB evaluations. Considering the analysis, the proposed power amplifier shows about 13 % improvement in power effiency at 400 MHz and -2 dBm output power. It is simulated in 0.18 μm CMOS technology.

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CMOS RF Power Amplifiers for Mobile Communications

Cited by 27 publications

References 27 publications

A 3.3 V 72.2 Mbit/s 802.11n WLAN transformer-based power amplifier in 65 nm CMOS

A 3.3 V 72.2 Mbit/s 802.11n WLAN transformer-based power amplifier in 65 nm CMOS

Building Radio Frequency Transmitter for LTE User Equipment

Efficiency Analysis of Low Power Class-E Power Amplifier

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