CMOS SOI gate driver with integrated optical supply and optical driving for fast power transistors

High Voltage SiC power MOSFETs have specific driving challenges such as a reduced short circuit capability (compared to Si IGBTs) and a weak field oxide layer, a large gate to source driving voltage (compared to GaN FETs), a high electric field under negative gate bias in off-state and a high switching speed. The negative bias in off-state creates a high stress which reduces the reliability of the SiC MOSFET. The high positive gate bias can generate large drain saturation current in case of short circuit events. We propose a modular multilevel architecture, which takes benefits of SOI isolation and low voltage CMOS transistors to drive SiC MOSFETs and to improve their reliability using an active and dynamic multilevel-selection on the switching sequences and on/off states.

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“…7. presents the characterization of one 5V submodule, which was designed and previously validated [14]. The output 5V…”

Section: B Preliminary Resultsmentioning

confidence: 99%

“…PMOS and NMOS of one submodule have a RDSon of 0.26Ω (25°C), +/-5A source/sink capability and a maximum slew rate of 5V/ns. Other specifications can be found in [14].…”

Section: B Preliminary Resultsmentioning

confidence: 99%

Modular Multilevel SOI-CMOS Active Gate Driver Architecture for SiC MOSFETs

Rouger

Barazi

Cousineau

et al. 2020

2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD)

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“…The isolated DC/DC converters used in gate drivers are generally realized by a Push-Pull converter or sometimes by a Flyback topology [7,10,24,25]. Gate drivers using an optical power transfer have also been studied [26,27]. Although these methods provide an optimal commonmode rejection, the low efficiency of the photoelectric transducers makes them inadequate for power modules command (power consumption >1W).…”

Section: Conventional Power Supply Topologies Used In Gate Drivermentioning

confidence: 99%

A Bidirectional Communicating Power Supply Circuit for Smart Gate Driver Boards

Weckbrodt

Ginot

Batard

et al. 2020

IEEE Trans. Power Electron.

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In power circuits, the gate drivers are required to provide an optimal and safe switching of power semiconductor devices. Nowadays, the gate driver boards include more and more features such as short-circuit detection, soft-shutdown, temperature sensing, on-state voltage monitoring… Research works are in progress on the integration of on-line monitoring features for a predictive maintenance. The instrumentation of the gate drive system supposes the integration of a communication system to transmit the monitoring data. In high power designs, a galvanic isolation is mandatory on the gate driver board. The parasitic capacitance seen on the isolation barrier is critical in these designs as it can lead to the circulation of common mode currents during the switching. Adding extra optocouplers or transformers on the isolation barrier is therefore risky due to ElectroMagnetic Interference (EMI) constraints. In this paper, a new bidirectional data transmission method is proposed for gate drivers used for driving 1.2kV SiC power MOSFETs. The proposed method enables the energy transmission and a bidirectional data exchange on a single power supply transformer. Experimental results are provided demonstrating 1Mb/s for TxD and 16kb/s for RxD. The targeted application is the health monitoring of SiC power MOSFETs using the gate driver board.

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“…The integration of photonic functionality in CMOS is promising for high-speed data communication, and opto-electronic system-on-chip applications. For most contemporary photonic and/or opto-electronic integrated circuits [1]- [5], CMOS technology is commonly extended with a dedicated waveguide (WG) layer having a low material absorption coefficient (α) and a high refractive index (n) for photonic functionalities [1]. Some industrial CMOS technologies, however, offer built-in thin films suitable as WGs, the most common being the silicon (Si) layer in silicon-on-insulator (SOI) technology [1], [5]- [7].…”

mentioning

confidence: 99%

“…For most contemporary photonic and/or opto-electronic integrated circuits [1]- [5], CMOS technology is commonly extended with a dedicated waveguide (WG) layer having a low material absorption coefficient (α) and a high refractive index (n) for photonic functionalities [1]. Some industrial CMOS technologies, however, offer built-in thin films suitable as WGs, the most common being the silicon (Si) layer in silicon-on-insulator (SOI) technology [1], [5]- [7]. Recently, a monolithic optocoupler was realized in standard high-voltage SOI CMOS [6], which not only includes an SOI layer as a WG for infrared (IR) light, but also a thin silicon nitride (Si 3 N 4 ) film laid atop the active Si surface, which is a potential WG for visible and IR light [7]- [12].…”

mentioning

confidence: 99%