CMOS voltage reference based on gate work function differences in poly-si controlled by conductivity type and impurity concentration

Abstract

A new CMOS voltage reference circuit consisting of two pairs of transistors is presented. One pair exhibits a threshold voltage difference with a negative temperature coefficient (0.49 mV/ C), while the other exhibits a positive temperature coefficient (+0.17 mV/ C). The circuit was robust to process variations and exhibited excellent temperature independence and stable output voltage. Aside from conductivity type and impurity concentrations of gate electrodes, transistors in the pairs were identical, meaning that the system was robust with respect to process fluctuations. Measurements of the voltage reference circuit without trimming adjustments revealed that it had excellent output voltage reproducibility of within 2%, low temperature coefficient of less than 80 ppm/ C, and low current consumption of 0.6 A.

Pentacene-Based Thin Film Transistor with Inkjet-Printed Nanocomposite High-K Dielectrics

“…The transfer curve and square root I DS versus gate voltage with 0 and 3 wt% TiO 2 -blending of the NC-dielectric pentacene OTFT in the saturation region (V DS = −50 V) is shown in Figure 4. The threshold voltage (V T ) for a pchannel TFT device is related to the capacitance of the gate oxide, as given by (1) [11] V…”

Sub 1 V CMOS bandgap reference design techniques: a survey

“…In standard CMOS technology, the technique of partially forward biasing the source bulk junction of PMOS transistors while making sure that the opamp is maintained in the high gain region have been proposed [11,12]. Other design techniques of implementing sub 1 V BVR circuits are based on the usage of subthreshold transistors [12,13], in order to take advantage of their low threshold voltage capability, or by a combine usage of depletion mode and enhancement mode transistors [14], or by taking advantage of the difference in the gate work function material of transistors having different doping level and type [15]. Additionally, dynamic threshold MOSFET (DTMOS) [16] have also been proposed to implement sub 1 V BVR circuits.…”

A 12 b 8 kS/s 16 μW 0.35 μm CMOS algorithmic ADC for sensor interface in ubiquitous environments

“…Although many CMOS reference circuits are implemented for various SoC applications, reference circuits with only enhancement-type MOS transistors are suitable for practical implementation. Although some techniques based on the gate work function difference in poly-Si [21] and the difference of threshold voltages between enhancement and depletion SOI MOSFET's [22] show good characteristics to temperature and supply voltage variations, those techniques need additional CMOS process steps for fabrication. The proposed ADC integrates optional full CMOS I/V references on-chip for stand-alone IP applications.…”