Coarse/Fine-grained Approaches for Pipelining Computing Stages in FPGA-Based Multicore Architectures

Azarian, Ali; Cardoso, João M. P.

doi:10.1007/978-3-319-14313-2_23

Cited by 2 publications

(1 citation statement)

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“…In FPGA-based custom computations, several approaches can be implemented to achieve high performance, such as latency hiding of independent functions and data streaming through pipelined operations [12]. Azarian and Cardoso [13] investigated the coarse/fine-grained dataflow synchronization approaches to achieve pipelining execution of the tasks in FPGA-based multicore architectures, in which results show a speedup in the overall execution through the use of multiple cores provided by FPGAs. Xilinx Virtex 5 FPGA was used with MicroBlaze soft microprocessors as cores.…”

Section: Related Workmentioning

confidence: 99%

Scalability Analysis of Deeply Pipelined Tsunami Simulation with Multiple FPGAs

Mondigo

Ueno

Sano

et al. 2019

IEICE Trans. Inf. & Syst.

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Since the hardware resource of a single FPGA is limited, one idea to scale the performance of FPGA-based HPC applications is to expand the design space with multiple FPGAs. This paper presents a scalable architecture of a deeply pipelined stream computing platform, where available parallelism and inter-FPGA link characteristics are investigated to achieve a scaled performance. For a practical exploration of this vast design space, a performance model is presented and verified with the evaluation of a tsunami simulation application implemented on Intel Arria 10 FPGAs. Finally, scalability analysis is performed, where speedup is achieved when increasing the computing pipeline over multiple FPGAs while maintaining the problem size of computation. Performance is scaled with multiple FP-GAs; however, performance degradation occurs with insufficient available bandwidth and large pipeline overhead brought by inadequate data stream size. Tsunami simulation results show that the highest scaled performance for 8 cascaded Arria 10 FPGAs is achieved with a single pipeline of 5 stream processing elements (SPEs), which obtained a scaled performance of 2.5 TFlops and a parallel efficiency of 98%, indicating the strong scalability of the multi-FPGA stream computing platform.

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Section: Related Workmentioning

confidence: 99%