“…The consequent benefit is potential alleviation of the performance penalty of scan, in addition to other benefits such as test time, data volume and power reduction. The previously proposed techniques in partial scan can be classified mainly into three categories: structure-based techniques that typically involves breaking the cycles and/or reducing scan depth [1,2,3,4,5,6,7,8,9,10,11], testabilitybased techniques that select scan flip-flops based on testability improvements [5,6,12,13,14,15,16,17,18,19,20,21], and test generation-based techniques which intertwine test generation and scan flip-flop selection [22,23,24,25,26,27]. Other partial scan techniques include those driven by layout constraints [5], timing constraints [28], re-timing [2,29], and toggling rate of flip-flops and entropy measures [30].…”