Combining Multiplication Methods with Optimized Processing Sequence for Polynomial Multiplier in GF(2 k )

Abstract

Abstract. In this paper we present an approach for optimizing the implementation of hardware multipliers in GF (2 k ). We investigate two different strategies namely the reduction of the complexity of the multiplication methods and the combination of different multiplication methods as a means to reduce the area and/or energy consumption of the hardware multiplier. As a means to explore the design space concerning the segmentation of the operands and the selection of the most appropriate multiplication methods we introduce an algorithm which determines the best combination of the multiplication methods. In order to assess the validity of our approach we have benchmarked it against theoretical results reconstructed from literature and against synthesis results using our inhouse 130 nm technology. The former revealed that our designs are up to 32 per cent smaller than those given in literature, the latter showed that our area prediction is extremely accurate.

Some new results on binary polynomial multiplication

“…The coefficients of C are computed using the following algorithm: [2] t63 = a [14] * b [13] [4] t77 = t67 * t70 t135 = t125 * t126 t193 = t190 + t191 t251 = t118 + t246 t309 = t247 + t307 t20 = a [5] * b [3] t78 = t68 * t69 t136 = t133 + t134 t194 = t193 + t192 t252 = t186 + t148 t310 = t248 + t308 t21 = t18 + t19 t79 = t76 + t77 t137 = t136 + t135 t195 = t181 * t185 t253 = t189 + t151 t311 = t118 + t306 t22 = t21 + t20 t80 = t79 + t78 t138 = t124 * t128 t196 = t182 * t184 t254 = t194 + t156 t312 = t178 + t309 t23 = a [4] * b [5] t81 = t67 * t71 t139 = t125 * t127 t197 = t195 + t196 t255 = t252 + t205 t313 = t179 + t310 t24 = a [5] * b [4] t82 = t68 * t70 t140 = t125 * t128 t198 = t182 * t185 t256 = t253 + t208 t314 = t197 + t312 t25 = t23 + t24 t83 = t81 + t82 t141 = t138 + t139 t199 = t180 + a [6] t257 = t254 + t213 t315 = t198 + t313 t26 = a [5] * b [5] t84 = t68 * t71 t142 = a [9] + t85 t200 = t181 + a [7] t258 = t249 + t255 t316 = t216 + t314 t27 = a [6] * b [6] t85 = a [ [11] + t90 t205 = t199 * t202 t263 = t261 + t64 c3 = t223 t32 = a [7] * b [7] t90 = b [8] + b [2] t148 = t142 * t145 t206 = t199 * t203 t264 = t262 + t65 c4 = t224 t33 = a [8] * b [6] t91 = t85 * t88 t149 = t142 * t146 t207 = t200 * t202 t265 = t263 + t141 c5 = t225 t34 = t31 + t32 t92 = t85 * t89 t150 = t143 * t145 t208 = t206 + t207 t266 = t264 + t140 c6 = t233 t35 = t34 + t33 t93 = t86 * t88 t151 = t149 + t150 t209 = t199 * t204 t267 = t263 + t239 c7 = t234 t36 = a [7] * b [8] t94 = t92 + t93 t152 = t142 * t147 t210 = t200 * t203 t268 = t264 + t240 c8 = t235 t37 = a [8] * b [7] t95 = t85 * t90 t153 = t143 * t146 t211 = t201 * t202 t269 = t61 + t48 c9 = t258 t38 = t36 + t37 t96 = t86 * t89 t154 = t144 * t145 t212 = t209 + t210 t270 = t121 + t129 c10 = t259 t39 = a [8] * b [8] t97 = t87 * t88 t155 = t152 + t153 t213 = t212 + t211 t271 = t122 + t...…”

“…The improved upper bounds are presented in [2]. This approach was also used in [25] and [13]. The best known results for almost all input sizes up to 1000 are listed in [2] using the 3-way and 4-way algorithms introduced in [3].…”

“…Because of applications in a variety of areas, such as cryptography and coding theory, new techniques for improving polynomial multiplication have been presented in numerous papers, e.g., [1,4,5,7,8,[13][14][15][16][17][18]20,[23][24][25]27,28]. For cryptographic applications, arithmetic in the binary extension field F 2 n is often used and, of the basic operations in F 2 n , multiplication contributes most to the total number of bit operations.…”

Horizontal DPA Attacks against ECC: Impact of Implemented Field Multiplication Formula

“…MMs for the implementation of the multipliers M_1,…,M_4 in PM_4 and all multipliers of PM_5 was chosen randomly. Details about the iterative 4-segment Karatsuba MM and the 3-segment Winograd MM are given in [22] and [19]. We do not give details here for the simplifying the reading.…”

“…Multisegment-Karatsuba MM (MSK) [16] and enhanced MSK [17] are examples of such combinations. In [18] and [19] different multiplication methods were combined with the goal to find the optimal combination, i.e. the combination with minimal gate complexity and energy consumption.…”