Common-Mode Voltage Mitigation Technique in Motor Drive Applications by Applying a Sampling-Time Adaptive Multi-Carrier PWM Method

Abstract

Common-mode voltage (CMV) in electric drives causes leakage current causing consequently EMI problems, loss and reduction of their components' lifetime. Several solutions have been proposed which usually lead to higher cost because additional components are used. This paper is focused on the mitigation of the resulting CMV produced by the operation of the VSD by means of a specifically designed PWM method. The proposal is based on the analysis of the CMV harmonic spectrum using the Fourier analysis. The CMV mitigation is achieved by modifying the time-shift displacement of the carriers each sampling time considering a multi-carrier PWM technique. The resulting method has been evaluated in a down scaled experimental setup and it is easily implementable on mostly off-the-shelf mid-range microcontroller control platforms.

A Review of Reduction Methods of Impact of Common-Mode Voltage on Electric Drives

“…Moreover, the application of the AZVC method may decrease the quality of the motor current [8]. Another modification of the modulation technique focused on CM voltage reduction is based on using the tri-carrier PWM method with a fixed or adaptive carrier phase displacement angle [31,32]. As a result, significant suppression of the CM voltage harmonic at the carrier frequency is reported, and u N_PE voltage levels may be effectively reduced to ±U DC /6.…”

“…As a result, significant suppression of the CM voltage harmonic at the carrier frequency is reported, and u N_PE voltage levels may be effectively reduced to ±U DC /6. Additionally, a 50% reduction in the leakage ground current may be achieved; however, an increase in the motor current THD is a negative effect of the applied method [32]. Moreover, significant modifications of inverter control algorithms are needed.…”

Comparison of Motor Neutral Point Overvoltage Oscillations in SiC-Based Adjustable Speed Drives using Two-Level and Three-Level Inverters

“…Various approaches have been developed to actively reduce the CM voltage by modifying either the inverter topology or the modulation scheme for the commonly used two-level (2L) and three-level (3L) power inverters [13]- [15]. These approaches assume the motor neutral point voltage is the same as the CM voltage generated by the power inverters, overlooking the neutral point overvoltage oscillations caused by the reflected wave phenomenon.…”

Common-Mode Voltage Harmonic Reduction in Variable Speed Drives Applying a Variable-Angle Carrier Phase-Displacement PWM Method

“…On the other hand, the CMV mitigation by developing new modulation techniques has been also explored by the academia and industry. For instance, in [17,25,27,[29][30][31][32] the proper switching patter selection based on space-vector modulation methods is proposed. Taking into account carrier-based PWM methods, as shown in Figure 2b, a PWM technique with three triangular carriers with phase-displacements equal to [φ a , φ b , φ c ] = [0, 120, 240] • was proposed in [33], where these carrier phase-displacement angles are found after an empirical trial and error method.…”