2014
DOI: 10.1088/1674-4926/35/11/114003
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Compact analytical model for single gate AlInSb/InSb high electron mobility transistors

Abstract: We have developed a 2D analytical model for the single gate AlInSb/InSb HEMT device by solving the Poisson equation using the parabolic approximation method. The developed model analyses the device performance by calculating the parameters such as surface potential, electric field distribution and drain current. The high mobility of the AlInSb/InSb quantum makes this HEMT ideal for high frequency, high power applications. The working of the single gate AlInSb/InSb HEMT device is studied by considering the vari… Show more

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Cited by 4 publications
(3 citation statements)
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“…The drain current in the 2DEG is calculated by the following basic equation Id=qWnsxsV()x, where q is the electron charge(1.6 * 10‐19 coulomb, ns( x ) is concentration of two‐dimensional electron gas, W is gate width, and V ( x ) is the electron velocity. The value of V ( x ) is given by V()x=μ0F1+FFc0.3emitalicif0.25emF<Fc, where0.25emF=dVc()xdx0.3emand0.5emFc=FTVsatμ0FTVsat. …”
Section: Model Formulationmentioning
confidence: 99%
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“…The drain current in the 2DEG is calculated by the following basic equation Id=qWnsxsV()x, where q is the electron charge(1.6 * 10‐19 coulomb, ns( x ) is concentration of two‐dimensional electron gas, W is gate width, and V ( x ) is the electron velocity. The value of V ( x ) is given by V()x=μ0F1+FFc0.3emitalicif0.25emF<Fc, where0.25emF=dVc()xdx0.3emand0.5emFc=FTVsatμ0FTVsat. …”
Section: Model Formulationmentioning
confidence: 99%
“…It consists of two material gates of different work functions that are combined to create a single gate. In order to improve the transport efficiency and to suppress the SCEs, choose the work function of M1(control gate is always greater than the work function of M2(screen Gate). Sona P Kumar at el developed a 2‐D analytical model for DMG AlGaN/GaN HEMT to analyze the minimum subthreshold characteristics.…”
Section: Introductionmentioning
confidence: 99%
“…Strategies including MuG architectures, gate stack engineering, bottom spacer, strain technology, and others have been explored to mitigate SCEs. [4][5][6] However, conventional MOSFETs' sharp doping profiles make it challenging to create very short-length devices with impeding the above methods. Even though there are many initiatives addressing SCEs, there is still a barrier to address these problems.…”
mentioning
confidence: 99%