Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs

Kretzschmar, Uli; Astarloa, Armando; Jiménez, Jaime; Garay, M.; Ser, Javier Del

doi:10.1109/tie.2013.2273476

Cited by 20 publications

(9 citation statements)

References 18 publications

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“…When t = m, adding soft error R to one cell C(i, j) randomly, simulate CA based on rule (6) and rule (8) Step 2. At time < , the SEE fault jamming situation is set to = 0, simulating the CA based on rules (6) and (7).…”

Section: The Algorithmmentioning

confidence: 99%

“…At time = , cell ( , ) is chosen randomly to be acted upon by SEE fault jam ≥ 1. By simulating using rule (8), if fault grade ( , ) of the cell is larger than the critical value, cell ( , ) is disabled.…”

Section: The Algorithmmentioning

confidence: 99%

“…Many efforts have been made in recent decades to measure, model, and mitigate radiation effects, applying numerous techniques and approaching the problem at various abstraction levels. There are three main research methods: mixed-level simulations, fault injection [7][8][9], and accelerated radiation ground testing [10,11].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Modeling and Experimental Study of Soft Error Propagation Based on Cellular Automaton

Wang

Xing

et al. 2016

Mathematical Problems in Engineering

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Aiming to estimate SEE soft error performance of complex electronic systems, a soft error propagation model based on cellular automaton is proposed and an estimation methodology based on circuit partitioning and error propagation is presented. Simulations indicate that different fault grade jamming and different coupling factors between cells are the main parameters influencing the vulnerability of the system. Accelerated radiation experiments have been developed to determine the main parameters for raw soft error vulnerability of the module and coupling factors. Results indicate that the proposed method is feasible.

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Section: The Algorithmmentioning

confidence: 99%

Section: The Algorithmmentioning

confidence: 99%

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Modeling and Experimental Study of Soft Error Propagation Based on Cellular Automaton

Wang

Xing

et al. 2016

Mathematical Problems in Engineering

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“…Moreover, in some unpredictable conditions, since a bit-flip in a frame can affect also the information in the other frames, the fault-free configuration cannot be restored after fault injection [13]. In this case, a reconfiguration of the entire device is therefore needed to avoid fault accumulation effects [17]. Furthermore, extra care must be taken since faults injected using the integrated approaches can affect the operations of the fault injection infrastructure itself.…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, extra care must be taken since faults injected using the integrated approaches can affect the operations of the fault injection infrastructure itself. This unintended effect can lead to the stall of the fault injection process, or to unknown erroneous faults classification results [17].…”

Section: Introductionmentioning

confidence: 99%

A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs

Carlo

Prinetto

Rolfo

et al. 2014

2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

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Modern SRAM-based Field Programmable Gate Arrays (FPGAs) are increasingly employed in safety-and missioncritical applications. However, the aggressive technology scaling is highlighting the increasing sensitivity of such devices to Single Event Upsets (SEUs) caused by external radiation events. Assessing the reliability of FPGA-based systems in the early design stages is of upmost importance, allowing design exploration of different protection alternatives.This paper presents a Dynamic Partial Reconfiguration-based fault injection methodology implemented by an integrated infrastructure for SEUs emulation in the configuration memory of Xilinx SRAM-based FPGAs. The proposed methodology exploits the Xilinx Essential Bits technology to extremely speed-up fault injection, ensuring correct operations of the fault injection infrastructure during the whole injection process.

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Multiple Fault Injection Platform for SRAM-Based FPGA Based on Ground-Level Radiation Experiments

Tonfat¹,

Tarrillo²,

Tambara³

et al. 2016

FPGAs and Parallel Architectures for Aerospace Applications

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Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs

Cited by 20 publications

References 18 publications

Modeling and Experimental Study of Soft Error Propagation Based on Cellular Automaton

Modeling and Experimental Study of Soft Error Propagation Based on Cellular Automaton

A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs

Multiple Fault Injection Platform for SRAM-Based FPGA Based on Ground-Level Radiation Experiments

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