IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society 2017
DOI: 10.1109/iecon.2017.8217125
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Comparative study between different SVPWM algorithms for NPC inverters in terms of common mode voltage reduction

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Cited by 8 publications
(11 citation statements)
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“…. This method is referred to LMZV method [42,43]. Another CMVR method can completely eliminate the CMV through the application of two medium vectors and one zero vector, since the latter produce a zero CMV.…”
Section: Topology Schematic Representation Features Limitationsmentioning
confidence: 99%
See 1 more Smart Citation
“…. This method is referred to LMZV method [42,43]. Another CMVR method can completely eliminate the CMV through the application of two medium vectors and one zero vector, since the latter produce a zero CMV.…”
Section: Topology Schematic Representation Features Limitationsmentioning
confidence: 99%
“…This CMVR method is denoted as 2M1ZV [44]. However, three nearest active medium vectors are applied to synthesize the reference vector in three medium vectors (3MV) method [42,44]. Virtual Space Vector PWM (VSVPWM) introduces a fresh concept for addressing the CMV issue.…”
Section: Topology Schematic Representation Features Limitationsmentioning
confidence: 99%
“…The CMV in a grid-connected 3L-NPC inverter is usually defined as the potential between the neutral point 'n' of the grid and the negative DC bus rail 'N' such that [17]…”
Section: In the 3l-npc Invertermentioning
confidence: 99%
“…The CMV in a grid‐connected 3L‐NPC inverter is usually defined as the potential between the neutral point ‘ n ’ of the grid and the negative DC bus rail ‘N’ such that [17] vCM=vnN=13vaN+vbN+vcNvan+vbn+vcn, van, vbn, and vcn are the inverter's poles voltages referred to the neutral point ‘ n ’ of the grid. vaN, vbN, and vcN are the inverter's poles voltages referred to the negative DC bus rail ‘N’.…”
Section: Conventional Dpc Algorithm For 3l‐npc Inverter and CMV Issuesmentioning
confidence: 99%
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