Comparing Performance of C Compilers Optimizations on Different Multicore Architectures

Machado, Roger; Almeida, Ricardo Borges; Jardim, Andre D.; Pernas, Ana Marilza; Yamin, Adenauer; Cavalheiro, Gerson Geraldo H.

doi:10.1109/sbac-padw.2017.13

Cited by 14 publications

(6 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…So, assessing the impact of these compilers on soft error reliability is vital to guarantee the success of their products. If, on the one hand, most of the work on compilation flags in the literature focuses on performance optimization [33], and into reducing memory usage and code size [34]. Few are those that assess the soft error reliability provided by compilers [15,17,19].…”

Section: Soft Error Consistency Assessment For Single‐core Processorsmentioning

confidence: 99%

Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator

Abich

Garibotti

Bandeira

et al. 2021

IET Computers & Digital Tech

View full text Add to dashboard Cite

Soft error resilience has become an essential design metric in electronic computing systems as advanced technology nodes have become less robust to high‐charged particle effects. Designers, therefore, should be able to assess this metric considering several software stack components running on top of commercial processors, early in the design phase. With this in mind, researchers are using virtual platform (VP) frameworks to assess this metric due to their flexibility and high simulation performance. In this regard, herein, this goal is achieved by analysing the soft error consistency of a just‐in‐time fault injection simulator (OVPsim‐FIM) against fault injection campaigns conducted with event‐driven simulators (i.e. more realistic and accurate platforms) considering single and multicore processor architectures. Reference single‐core fault injection campaigns are performed on RTL descriptions of Arm Cortex‐M0 and M3 processors, while gem5 simulator is used to multicore Arm Cortex‐A9 scenarios. Campaigns consider different open‐source and commercial compilers as well as real software stacks including FreeRTOS/Linux kernels and 52 applications. Results show that OVPsim‐FIM is more than 1000× faster than cycle‐accurate simulators and up to 312× faster than event‐driven simulators, while preserving the soft error analysis accuracy (i.e. mismatch below to 10%) for single and multicore processors.

show abstract

Section: Soft Error Consistency Assessment For Single‐core Processorsmentioning

confidence: 99%

Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator

Abich

Garibotti

Bandeira

et al. 2021

IET Computers & Digital Tech

View full text Add to dashboard Cite

show abstract

“…Traditional compiler optimizations define a well-studied area, and some issues are been analysed in the literature in the past. But, these works follow a different approach to the proposed in this paper: they study the compiler phase order [4], compare different compiler [5], optimize specific software [6,7], or evaluate specific flags for some hardware platforms [8].…”

Section: Problem Descriptionmentioning

confidence: 99%

Finding Best Compiler Options for Critical Software Using Parallel Algorithms

Luque

Alba

2018

Intelligent Distributed Computing XII

View full text Add to dashboard Cite

The efficiency of a software piece is a key factor for many systems. Real-time programs, critical software, device drivers, kernel OS functions and many other software pieces which are executed thousands or even millions of times per day require a very efficient execution. How this software is built can significantly affect the run time for these programs, since the context is that of compile-once/run-many. In this sense, the optimization flags used during the compilation time are a crucial element for this goal and they could make a big difference in the final execution time. In this paper, we use parallel metaheuristic techniques to automatically decide which optimization flags should be activated during the compilation on a set of benchmarking programs. The using the appropriate flag configuration is a complex combinatorial problem, but our approach is able to adapt the flag tuning to the characteristics of the software, improving the final run times with respect to other spread practices.

show abstract

“…On multi‐core processors, tasks can be divided among the cores. Various application program interfaces such as open multi‐processing (OpenMP) and threading building blocks (TBB) have so far been produced for code parallelisation in different programming languages [5, 6]. Another way to parallelise the classification is to use platforms like Compute Unified Device Architecture (CUDA) on many‐core platforms like graphics processing units (GPUs) [7–15].…”

Section: Introductionmentioning

confidence: 99%

Efficient parallelisation of the packet classification algorithms on multi‐core central processing units using multi‐threading application program interfaces

Abbasi

Rafiee

2020

IET Computers & Digital Techniques

View full text Add to dashboard Cite

Comparing Performance of C Compilers Optimizations on Different Multicore Architectures

Cited by 14 publications

References 5 publications

Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator

Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator

Finding Best Compiler Options for Critical Software Using Parallel Algorithms

Efficient parallelisation of the packet classification algorithms on multi‐core central processing units using multi‐threading application program interfaces

Contact Info

Product

Resources

About