2019
DOI: 10.1088/1361-6641/aafccc
|View full text |Cite
|
Sign up to set email alerts
|

Comparison between nMOS and pMOS Ω-gate nanowire down to 10 nm width as a function of back gate bias

Abstract: This paper presents a comparison between nMOS and pMOS Ω-Gate Nanowire for different channel width (W NW ) down to 10 nm as a function of the large back gate bias variation (from +20 to −20 V) experimentally and by simulation. The main digital and analog parameters are analyzed in these devices as threshold voltage, subthreshold swing (SS), transconductance, transistor efficiency, Early Voltage and intrinsic voltage gain for transistor channel width from 220 nm down to 10 nm. It is shown that narrow channel de… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Publication Types

Select...

Relationship

0
0

Authors

Journals

citations
Cited by 0 publications
references
References 18 publications
0
0
0
Order By: Relevance

No citations

Set email alert for when this publication receives citations?