Comparison of selected architectures of negative Charge Pumps with new design

Matoušek, David

doi:10.1109/radioelek.2014.6828461

Cited by 7 publications

(7 citation statements)

References 8 publications

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“…After some basic operations, the voltages at the falling edge of clk1 and clk2, V e1 and V e2 , are calculated through (16) and (17), respectively, where V e1 and V e2 are the two matrices that represent the voltages at all elements at the falling edge of clk1 and clk2, C is given by (18) and I is the identity matrix.…”

Section: Charge Pump Model Including Parasitic Capacitances With An Imentioning

confidence: 99%

“…Different DC/DC converters have been proposed in the literature, and they can be grouped in two main categories: inductive and capacitive DC/DC converters. Also, other topologies derived from the classical ones can be found in [15][16][17]. The latter, also called capacitive charge pump circuits, is particularly attractive because they offer efficient and low power DC/DC conversion in a small area.…”

Section: Introductionmentioning

confidence: 99%

“…Classic topologies like the Dickson, also called linear charge pump (LQP) [12], Fibonacci (FQP) [13], or exponential (EQP) [14], are examples of capacitive DC/DC converters. Also, other topologies derived from the classical ones can be found in [15][16][17]. In micro-energy harvesting applications, capacitive charge pumps with low switching frequencies are most appropriate in order to reduce excessive dynamic power consumption.…”

Section: Introductionmentioning

confidence: 99%

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Dynamic joint model of capacitive charge pumps and on‐chip photovoltaic cells for CMOS micro‐energy harvesting

Ferro

López

Brea

et al. 2016

Circuit Theory & Apps

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On-chip energy harvesting by means of integrated photovoltaic cells in standard CMOS technology can be successfully used to recharge or power-up integrated circuits with the use of charge pumps for voltage boosting. In this paper, a tool to facilitate the design of such structures is proposed consisting of an accurate model of the joint dynamics of the micro-photovoltaic cell and a capacitive DC/DC converter in the slowswitching limit regime. The model takes into account both the top and bottom parasitic capacitances of the flying capacitors. We assume a classical model for the photodiode whose photogenerated current is extracted from device-level simulations. The joint model is verified by circuit-level simulations achieving high accuracy and computation time savings of up to 1700×. The joint model shows that the voltage generated by an integrated photovoltaic cell connected to a capacitive DC/DC converter is not constant even under constant illumination. This phenomenon can only be reproduced through the joint model and failing to take it into account results in an error in the estimation of the time needed by the DC/DC converter to reach a given output voltage. We also demonstrate that the maximum output voltage reached by a DC/DC converter in the slow-switching limit regime when a photovoltaic cell is used as energy transducer depends on the switching frequency. Finally, the applicability of the model is illustrated through the optimization of time response and charge efficiency for the Dickson, Fibonacci, and exponential topologies in the case of implantable devices.

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Section: Charge Pump Model Including Parasitic Capacitances With An Imentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Dynamic joint model of capacitive charge pumps and on‐chip photovoltaic cells for CMOS micro‐energy harvesting

Ferro

López

Brea

et al. 2016

Circuit Theory & Apps

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“…It limits the DCP implementation, especially for supply voltage lower than 1 V. Therefore, sub-volt applications use other architectures of charge pumps [3], [4]. A change of connection of transfer transistor from diode mode to switching mode [5], [6], [7] is generally used principle for threshold effect suppression.…”

Section: Introductionmentioning

confidence: 99%

Efficiency of Innovative Charge Pump versus Clock Frequency and MOSFETs Sizes

Matoušek

Hospodka

Subrt

2016

Measurement Science Review

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Charge pumps are circuits that produce the voltage higher than supply voltage or negative voltage. Today, charge pumps became an integral part of the electronic equipment. The integration of charge pumps directly into the system allows manufacturers to feed a complex system with many specific power requirements from a single source. However, charge pump efficiency is reduced by many phenomena. This paper is focused on the question of efficiency of proposed variant of the charge pump. In this article, the efficiency dependence on a number of stages, output current, clock frequency and MOSFETs sizes was simulated by Eldo. The aim of this study is to determine the MOSFETs sizes and theirs influence to efficiency and the output voltage. Complex optimization of the charge pump circuit will follow in further text.

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“…Especially for supply voltage lower than 1 V threshold voltage limits implementation of Dickson Charge Pump. So sub-volt applications use another architectures of Charge Pumps [4], [5].…”

Section: Introductionmentioning

confidence: 99%

An innovative Charge Pump design and its properties optimization

Matoušek

Subrt

2015

2015 25th International Conference Radioelektronika (RADIOELEKTRONIKA)

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Trend of maximum reduction of the power consumption of electronic devices is still at forefront of interest. For portable electronic appliances Charge Pumps are usually used. Indeed Charge Pumps have particularly small size, easy integrability and higher working frequency than conventional DC/DC converters. The integration of Charge Pumps directly into the system allows manufacturers to feed a complex system with many specific power requirements from a single source. But Charge Pump efficiency is reduced by many phenomena. Relatively strong effect has threshold voltage of used transistors or diodes. This paper is concentrated on optimizing of properties of proposed variant of Charge Pump. So output voltage, drawn current and resulted efficiency of proposed Charge Pump were optimized based on simulations executed by Mentor Graphics.

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Comparison of selected architectures of negative Charge Pumps with new design

Cited by 7 publications

References 8 publications

Dynamic joint model of capacitive charge pumps and on‐chip photovoltaic cells for CMOS micro‐energy harvesting

Dynamic joint model of capacitive charge pumps and on‐chip photovoltaic cells for CMOS micro‐energy harvesting

Efficiency of Innovative Charge Pump versus Clock Frequency and MOSFETs Sizes

An innovative Charge Pump design and its properties optimization

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