Compensating mask topography effects in CPL through-pitch solutions toward the 45nm node

Bekaert, Joost; Philipsen, Vicky; Vandenberghe, Geert; Broeke, Doug Van Den; Degel, Wolfgang; Zibold, A.

doi:10.1117/12.632084

Cited by 4 publications

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“…In what follows we will derive the essential effects of phase errors on image contrast by means of a simple model based on two beam interference assuming an ideal lens. Similar discussions can be found in, for example, [2,9,10]. Polarization dependent reflection at the resist surface as well as vector effects are neglected.…”

Section: Theorymentioning

confidence: 79%

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Image degradation due to phase effects in chromeless phase lithography

et al. 2006

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Chromeless Phase Lithography (CPL) is discussed as interesting option for the 65nm node and beyond offering high resolution and small Mask Error Enhancement Factor. However, it was shown recently that at high NA CPL masks can exhibit large polarization and also phase effects. A well known phase effect occurring for CPL semi dense lines are through focus Bossung tilts. However, another manifestation of phase effects for dense lines and spaces is a reduced contrast for a symmetrical offaxis illumination due to phase errors between 0 th and 1 st diffraction order. In this paper it is shown that these phase effects can lead to a significant contrast loss for dense features smaller than 60nm half pitch. While also present for trench structures, the contrast reduction is more pronounced for mesa style structures. It is shown that for mesa structures an adjustment of etch depth can not recover an effective pi-phase shift. Furthermore, significant polarization effects are observed. As an example, the optimum mesa structure for TE polarization is shifted to small lines. For an experimental validation, a CPL mask containing dense lines and spaces was fabricated. Their imaging performance was characterized with an AIMS 45i offering NA's greater than 1 and linearly polarized illumination as well as by wafer printing. Gratings with pitches down to 100 nm with varying duty cycles were measured with TE, TM and unpolarized dipole illumination. Very good agreement between measurement and simulation results confirmed the validity of theoretical predictions.

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Section: Theorymentioning

confidence: 79%

“…They may have severe impact on their lithographic performance and therefore need to be investigated carefully. CPL masks have been studied for usage in advanced lithography since many years [1][2][3][4][5][6][7]. Main focus for application in the past was logic devices.…”

Section: Introductionmentioning

confidence: 99%

Image degradation due to phase effects in chromeless phase lithography

et al. 2006

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“…Several publications have studied this effect. [5,6] Using the schematic diagram as drown in Figure 11, we try to explain this phenomenon. To create a 180 degree phase difference for quartz material, the nominal etch depth is 171nm.…”

Section: Implementation Of 6% Cpl Mask On Contact Printingmentioning

confidence: 98%

RET masks for patterning 45nm node contact hole using ArF immersion lithography

Hsu¹,

Chen²,

Broeke³

et al. 2006

SPIE Proceedings

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Immersion exposure system with the numerical aperture (NA) greater than unity effectively extends the printing resolution limit without the need of shrinking the exposure wavelength. From the perspective of imaging contact hole mask, we are convinced that a mature ArF immersion exposure system will be able to meet 45nm node manufacturing requirement. However, from a full-chip mask data processing point of view, a more challenging question could be: how to ensure the intended RET mask to best achieve a production worthy solution? At 45nm, we are using one-fourth of the exposure wavelength for the patterning; there is very little room for error. For full-chip, especially for contact hole mask, we need a robust RET mask strategy to ensure sufficient CD control. A production-worthy RET mask technology should have good imaging performance with advanced exposure system; and, it should base on currently available mask blank material and be compatible with the existing mask making process.In this work, we propose a new type of contact hole RET masks that is capable of 45nm node full-chip manufacturing. Three types of potential RET masks are studied. The 1 st type is the conventional 6% attenuated PSM (attPSM) with 0-phase Scattering Bars (SB). The 2 nd type is to use CPL mask with both 0-and π-phase SB, and their relative placements are based on interference mapping lithography (IML) under optimized illumination. The 3 rd type, here named as 6% CPL, can be thought of as a CPL mask type with 6% transmission on the background but with π-phase SB only. Of those three RET masks, 6% CPL mask has the best performance for printing 45nm contact and via masks.To implement 6% CPL for contact and via mask design, we study several critical process steps starting from the illumination optimization, model-based SB OPC, 3D mask effect, quartz etch depth optimization, side-lobe printability verification, and then to the mask making flow. Additionally, we investigate printability for through-pitch contact array, and random contact design. To characterize the printing performance, we use MEEF, and process window (PW) to analyze the simulation data. We conclude that the 45nm node contact hole imaging is well within reach using a mature ArF immersion exposure tool with a robust and well integrated RET mask scheme.

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“…Compared to APSM, CPL shows more flexibility for tuning the process window due to Cr shielding. This technique is successfully applied for the imaging of patterns without causing phase conflicts or throughput loss [5,7].…”

Section: Hye-youngmentioning

confidence: 99%

Optimization of chromeless phase mask by comparing scattering bars with zebra patterns

et al. 2006

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Resolution enhancement technology (RET) refer to techniques that extend the usable resolution of an imaging system without decreasing the wavelength of light or increasing the numerical aperture (NA) of the imaging tool. Off-axis illumination (OAI) and phase shift mask (PSM) are essentially accompanied with optical proximity correction (OPC) for most devices nowadays. In general, these three techniques do not work in isolation and the most aggressive mainstream lithography approaches use combinations of all RETs. In fact, OAI and PSM are essentially useless for typical chip-manufacturing applications unless accompanied by OPC. For low k 1 imaging, strong OAI such as Quasar or dipole illumination types is the best. We used dipole illumination in this study. By using strong OAI, the amplitude of the 0 th order is decreased and the amplitude of the 1 st order is increased. Chromeless phase lithography (CPL) is one of PSM technologies and CPL mask is the possible solution for small geometry with low mask error enhancement factor (MEEF). CPL uses only 180 degrees phase-shifter on transparent glass without chromium film to define light-shielding region, destructive interference between light transmitted through the 0 degree and 180 degrees regions produces dark images. To obtain the best resolution, proper OPC is required with CPL. While the most common and straightforward application of OPC is to simply move absorber edges on the mask by giving simple mask bias, the interesting and important additional technique is the use of scattering bars. Also, we can use zebra patterns for the transmission control. Mask intensity transmission changes can impact the image quality. Zebra patterns are formed by adding chromium transverse features. The transmission will be controlled by the zebra pattern density. Technology node with ArF source is studied and the mask optimization is found to be a critical. And the linewidth of scattering bars, transmission (using zebra feature) are varied at line and space (L/S) patterns. We used 65 nm node 5 L/S and 45 nm node isolated line pattern. In order to optimize the zebra pattern density, we need to control the line width and pitch of the zebra patterns. For dense line and isolated line, the use of scattering bars and zebra patterns affected target critical dimension. We found out the better process window at dense 65 nm node by comparing the use of scattering bars with zebra patterns. Likewise, we optimized the isolated 45 nm node.

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Compensating mask topography effects in CPL through-pitch solutions toward the 45nm node

Cited by 4 publications

References 0 publications

Image degradation due to phase effects in chromeless phase lithography

Image degradation due to phase effects in chromeless phase lithography

RET masks for patterning 45nm node contact hole using ArF immersion lithography

Optimization of chromeless phase mask by comparing scattering bars with zebra patterns

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