Complementary‐Like Graphene Logic Gates Controlled by Electrostatic Doping

Abstract

The isolation of graphene offers an emerging candidate to nanoelectronics, [ 1 ] because it exhibits a range of remarkable properties, such as high carrier mobility, [ 2 , 3 ] shorter scaling length, [ 4 , 5 ] and compatibility with planar lithography process. Although the ambipolar conduction behavior intrinsic to graphene hinders the feasibility of logic devices directly in a conventional complementary (CMOS) architecture, several methods have been recently developed. [6][7][8][9][10][11] Among them, a self-adaptive complementary-like architecture based on ambipolar transistors is especially interesting, [12][13][14][15][16] because the ambipolar nature is used as a benefi t rather than a drawback to form logic devices. Free of doping, charge neutrality points (CNPs) of two involved transistors are controlled by a supply bias ( V DD ) and the intrinsic p-and n-conduction branches are delicately combined to construct a complementary geometry. Following this route, we previously demonstrated the fi rst example of graphene voltage inverters with voltage gain greater than one. [ 10 ] Enhanced device performance was achieved by introducing a bandgap into the channels. [ 11 ] It would be interesting for graphene nanoelectronics if component integration and logic devices advanced than inverters can be realized.With constant miniaturation of chip size, the V DD level in microelectronics has presently scaled down to about 1 V. In an attempt to fabricate advanced logic gates, we found that the self-adaptive architecture has an intrinsic limitation for the integration of complicated structure under low V DD bias, [10][11][12] because the CNP splitting rely solely on the magnitude of V DD and is rather small as V DD is 1 V or less, which makes the complementary transistor pairs indistinguishable in complicated integration structures with more than two transistors. A direct consequence includes low performance of NAND and NOR gates in which four transistors are involved. [ 12 ] Surely,

Integrated Circuits and Logic Operations Based on Single-Layer MoS2

“…We note that to the best of our knowledge the maximal voltage gain for graphene-based inverters 22 demonstrated so far is 2À7 but at the temperature of 80 K, 23,35 due to the low band gap (<100 meV) in bilayer graphene, which prohibits the use of such devices at room temperature.…”

Graphene-based ambipolar electronics for radio frequency applications

“…Besides, there are many other methods to introduce band-gap, such as substrate-induced band-gap [55], molecule adsorption [56], etc, but these methods are less reliable and controllable. Based on biased bi-layer graphene with considerable bandgap, digital logic units such as complementary-like NOT-, NOR-, and NAND-gate are all realized [57,58].…”

X-Ray Emission Spectra of Graphene Nanosheets

“…1 These characteristics provide the potential for the development of graphene-based electronics. It is worth mentioning that prototypes of future graphene-based devices such as highly selective gas sensors, 6 transparent conducting electrodes, 7 and graphenebased transistors 8 have been produced. Graphene also possesses interesting thermal and mechanical properties, 9 high electrical-conductivity, a large surface-area, and high chemical-stability; these properties make it an attractive candidate for potential applications such as fillers for electrically conducting flexible nanocomposites, 10 and for use in energy-storage devices such as supercapacitors 11 and lithium-ion batteries.…”