Complex Field Fault Modeling-Based Optimal Frequency Selection in Linear Analog Circuit Fault Diagnosis

Abstract

Owing to the lack of feasible fault modeling method, hard (open and short) faults, and discretized parametric faults are still the mostly used fault models. These models cannot characterize all soft (parameter shifting) faults because that the parameter of analog element be of continuity character. To address this concern, a complex field fault modeling method is presented first. If fault happens to passive element x i in linear analog circuit, the real (U r ) and imaginary (U j ) parts of faulty voltage phasor U°(U°= U r + j U j ) must satisfy binary quadratic function F i (U r , U j ) = 0, which is independent from the value of element x i and uniquely determined by its location and the nominal circuit under test. Hence, the binary quadratic function can model any continuous parameter shifting (soft) or hard fault. Second, to avoid calculating the explicit expression of binary quadratic function, a simulation-based method is given to obtain the locus of the change in the function F z in the complex plane. Besides, the nominal (fault-free) point, the loci determined by the binary quadratic functions might intersect with each other. It is referred to as aliasing problem in this paper. This problem can be solved by adjusting the frequency of the input signal. Therefore, a constraint optimization method is proposed to select optimal test frequencies. The proposed test generation and compression methods, when combined with the complex field modeling method, can pinpoint much more fault components with less test points and frequencies when compared with the other methods.

Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage

“…In addition, both the 3D model 1 3D (⋅) proposed in [14], and the complex-circle-based fault model proposed in [12,13] are adopted for comparison. In the example of 2 and 1 in the Sallen-Key filter, distances between 2 and 1-loci are provided in Table 4, according to each fault model, respectively; the comparison range is from ×10 −2 to ×10 2 , where is the fault-free value of 2 and 1.…”

“…In the example of 2 and 1 in the Sallen-Key filter, distances between 2 and 1-loci are provided in Table 4, according to each fault model, respectively; the comparison range is from ×10 −2 to ×10 2 , where is the fault-free value of 2 and 1. The results of comparison between different methods are also illustrated in Figure 5, in which the curve 1 is the distance of 2-1 in the 3D model 2 3D (⋅), the curve 2 is the distance defined in the 2D model, the dash curve 3 is defined by 1 3D (⋅) [14], and dash curve 4 is related to complex-circle-based fault model [12,13]. As shown in Table 4, 3 is better than 4; however, because the biggest gap between 3 and 4 is less than 2.2%, 4 is very close to 3 in Figure 5.…”

“…To achieve detection of parametric faults for analog circuits, Yang et al proposes a complex-circle based fault model [3]. Although this proposed fault model is improved sequentially by optimal testing frequency selection [12] and fault location [13], the weakness of fault masking still remains. Moreover, a 3D model based on transfer function was proposed in [14]; it extends the distances between fault loci and improves the practicability for applications.…”

A Systematic Method for Arranging Diagnostic Tests in Linear Analog DC and AC Circuits

“…evolutionary computations [6] and fault-pair isolation tables [24]. A method for selection of optimal test frequencies, used by soft and hard fault diagnoses, is developed in reference [22]. A test that finds a set of optimal sampling points in CMOS circuits with ramp input signal is proposed in reference [14].…”

A Teamwork Fault Detection Scheme for Five-tank System

“…For detailed information on the basic ideas, the main academic progress and typical applications of each method, one can refer to the survey paper [9]. In [10], a fault diagnosis realization method is illustrated for linear analog circuit system. While under the consideration of packet-dropout compensation and time-varying delay, Jiang S. and Fang H. J.…”