Computation and analysis of output error probability for C17 benchmark circuit using bayesian networks error modeling

Khalid, Usman; Anwer, Jahanzeb; Singh, Narinderjit; Hamid, Nor Hisham; Asirvadam, Vijanth S.

doi:10.1109/scored.2010.5704037

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Reliability Evaluation For Deterministic Inputs1

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Cited by 6 publications

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“…The reliability evaluation can be done using Bayesian networks algorithm as described in [3]. Calculate and record the reliability values for each test circuit.…”

Section: Methodsmentioning

confidence: 99%

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Improvement in reliability by changing the deterministic inputs of nanoscale circuits

Khalid

Anwer

Singh

et al. 2011

2011 IEEE Regional Symposium on Micro and Nano Electronics

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Scaling of CMOS technology is degrading the reliability of upcoming microelectronic devices. When the circuit design enters the nanoscale dimensions, the inputs have more influence on the circuit's reliability due to the circuit's internal noises and gate errors. In this paper, we will model the deterministic inputs probabilistically and analyze their effect on the reliability of digital circuits. The analysis is based on the Bayesian networks error modelling scheme. The simulations are based on MATLAB and show the important relationships among different deterministic inputs and their reliabilities. The results show the range of reliability values obtained by changing the deterministic input probability values.

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“…The reliability evaluation can be done using Bayesian networks algorithm as described in [3]. Calculate and record the reliability values for each test circuit.…”

Section: Methodsmentioning

confidence: 99%

“…Another approach is utilized for evaluation of reliability of a circuit using Bayesian networks [3,4]. There is brief algorithm discussed as follows to evaluate the reliability for nanoscale circuits.…”

Section: Reliability Evaluation For Deterministic Inputsmentioning

confidence: 99%