Conducting-Interlayer SiO_x Memory Devices on Rigid and Flexible Substrates

Abstract

SiOx memory devices that offer significant improvement in switching performance were fabricated at room temperature with conducting interlayers such as Pd, Ti, carbon, or multilayer graphene. In particular, the Pd-interlayer SiOx memory devices exhibited improvements in lowering the electroforming voltages and threshold voltages as the number of inserted Pd layers was increased, as compared to a pure SiOx memory structure. In addition, we demonstrated that the Pd-interlayer SiOx junction fabricated on a flexible substrate maintained low electroforming voltage and mechanically stable switching properties. From these observations, a possible switching mechanism is discussed based on the formation of individual conducting paths at the weakest edge regions of each SiOx film, where the normalized bond-breaking probability of SiOx is influenced by the voltage and the thickness of SiOx. This fabrication approach offers a useful structural platform for next-generation memory applications for enhancement of the switching properties while maintaining a low-temperature fabrication method that is even amenable with flexible substrates.

Structural changes and conductance thresholds in metal-free intrinsic SiOx resistive random access memory

“…We note that both the forming voltage and the programming voltages are significantly lower than those reported in our previous study of SiO x MOS (metal-oxidesemiconductor) RRAM devices, 2,16 and are similar to those reported for SiO x devices using conductive interlayers such as Pd, Ti, or carbon. 20 This is likely to be due to a combination of factors: the simpler device structure of MIM, with fewer interfaces, and the intrinsically higher conductivity of metallic electrodes. Similarly, set state (low resistance state) currents are higher for MIM than MOS (3 mA, compared with a few lA).…”

Ellipsometric Study of SiOx Thin Films by Thermal Evaporation

“…The above equation can be obtained from the series expansion of Equation (2). Cauchy model is an equation relative to the refractive index n, an approximate function of the Sellmeier model [14].…”

Amorphous‐Si‐Based Resistive Switching Memories with Highly Reduced Electroforming Voltage and Enlarged Memory Window

“…[ 1,2 ] Therefore, a wide variety of materials such as amorphous Si, [3][4][5] silicon oxide, [6][7][8] metal oxide, [9][10][11][12] nanocomposites [ 13 ] and organic materials [ 14 ] have been investigated as potential candidates for resistive switching devices. In addition, in order to better understand the switching behaviors, several mechanisms have been proposed.…”

“…[ 2,15,16,23 ] In order to activate the fresh resistive memory into switching states, the electroforming process, which usually adopts a higher voltage than the usual operation voltage, is needed to form the localized semipermanent conductive fi lament inside the active materials. [ 8,16,23 ] However, the device yield and the switching performance would be limited with high electroforming voltage which may cause permanent damage to the RRAM. [ 16,24,25 ] In addition, the integration potential of the crossbar array confi guration could also be restricted by the electroforming process.…”

“…[ 7,8,11,31,32 ] However, these methods commonly involve relatively complex fabrication process [ 8,11 ] or require high temperature for thermal annealing treatment [ 7,32 ] which may degrade the previously deposited selector or diode performance and are not suitable for stackable integration. [ 9,33 ] Furthermore, the high temperature processes are also not suitable to fabricate memory devices on the thermal instability fl exible substrates.…”