Consistent model for short-channel nMOSFET after hard gate oxide breakdown

Physically unclonable function using CMOS breakdown position

“…6). This behavior can be attributed to the dominating trapassisted tunneling (TAT) leakage path formed by different numbers of traps [14], [22]. In addition to the pre-existing defects, the forming stress could potentially activate defects in the unbroken nFET, resulting in higher probability to have multiple defect conduction path.…”

“…When applying high voltage stress to the gate of MOSFETs, it randomly generates defects within the gate oxide [13]. After being stressed for a sufficient time, some defects may form one or more percolation paths [14]. Therefore, the positions of these paths will also be randomly distributed between the source and the drain of the FET.…”

“…Therefore, the positions of these paths will also be randomly distributed between the source and the drain of the FET. In the case that only one breakdown path exists in the FET, the lateral position of this breakdown can be determined based on voltage and current behavior [14]- [17].…”

Scalable methods for the analysis and optimization of gate oxide breakdown

“…Various modeling approaches for post-breakdown analysis at the transistor-or cell-level have been proposed in the literature. The work in [10] suggests a complex physical model that reduces to a simple resistor model when the breakdown location is near the source or drain. Independent experiments have reported that HBDs show a roughly linear (ohmic) I-V characteristic [1].…”

“…The only known work is an equivalent circuit model in [10], but it requires a complex characterization process; moreover, the nonlinearity of the model makes its evaluation in a circuit simulator more computational. We derive a much simpler model based on the idea of fitting the result from experiments and simulation which requires very few measurements for characterization.…”