International Symposium onInformation Theory, 2004. ISIT 2004. Proceedings.
DOI: 10.1109/isit.2004.1365089
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Contention-free interleavers

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Cited by 26 publications
(24 citation statements)
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“…Designing the interleaving pattern wisely can prevent such collision [1] and empirical results show that these contention-free interleavers can yield similar performance as conventional interleavers designed for serial implementation [2,3] . However, we notice that they are all constructed in a semi-random way so that at least one part of the interleaver pattern must be stored explicitly, which can be inconvenient when support for different code length is required.…”
Section: Introductionmentioning
confidence: 97%
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“…Designing the interleaving pattern wisely can prevent such collision [1] and empirical results show that these contention-free interleavers can yield similar performance as conventional interleavers designed for serial implementation [2,3] . However, we notice that they are all constructed in a semi-random way so that at least one part of the interleaver pattern must be stored explicitly, which can be inconvenient when support for different code length is required.…”
Section: Introductionmentioning
confidence: 97%
“…A decoder using parallel maximum a priori (MAP) algorithm contains multiple soft-inputsoft-output (SISO) modules [1] , so parallel access to these storages is required. When translated into hardware design, it means that data required by different SISOs at the same time must not be stored in the same RAM block.…”
Section: Introductionmentioning
confidence: 99%
“…3GPP LTE requires high degree of parallelism [15,26], which can be achieved by overcoming memory access contention problem. [27][28][29][30] present the first approaches to solve the memory access contention problem by designing the contentionfree interleavers. Quadratic permutation polynomial (QPP) interleaver [9] has been proposed as a contention-free, parallel interleaver suitable for 3GPP-LTE.…”
Section: Introductionmentioning
confidence: 99%
“…The first approaches to solve the memory access contention problem simply avoided it by constraining the interleavers to be contention-free as in [2], [3], [5], [16]. For these type of constrained constructions of interleavers, Nimbalker et al have shown that only a very small fraction of all interleavers are suitable for parallel processing of iterative decoding [2]. They have also proposed a new construction of a modified dithered relatively prime 3 interleaver [8] (DRP) interleaver.…”
Section: Introductionmentioning
confidence: 99%
“…1 In turbo coding applications, this property is also desirable in the reverse order, i.e., when subblock 0 and 1 switch roles. A mathematical description of the contention-free condition from [2] is now given. The exchange and processing of a sequence of N = MW extrinsic information symbols between sub-blocks of the iterative decoder can be parallelized by M processors working on window sizes of length W in each sub-block without contending for memory access provided that the following condition holds for both the interleaver f (x), 0 ≤ x < N and deinterleaver where 0 ≤ j < W , 0 ≤ t < v < N/W , and π(·) is either f (·) or g(·).…”
Section: Introductionmentioning
confidence: 99%