Controlled elements for designing ciphers suitable to efficient VLSI implementation

Abstract

This work considers the problem of increasing the performance of the ciphers based on Data-Dependent (DD) operations (DDO) for VLSI implementations. New minimum size primitives are proposed to design DDOs. Using advanced DDOs instead of DD permutations (DDP) in the DDP-based iterative ciphers Cobra-H64 and Cobra-H128 the number of rounds has been significantly reduced yielding enhancement of the "performance per cost" value and retaining security at the level of indistinguishability from a random transformation. To obtain further enhancement of this parameter a new crypto-scheme based on the advanced DDOs is proposed. The FPGA implementation of the proposed crypto-scheme achieves higher throughput value and minimizes the allocated resources than the conventional designs. Design of the DDO boxes of different orders is considered and their ASIC implementation is estimated.

Security analysis of the full-round DDO-64 block cipher

“…Description of DDO-64V 1 and DDO-64V 2 DDO-64V 1 and DDO-64V 2 (Moldovyan et al, 2004(Moldovyan et al, , 2006 are 8-round block ciphers with a 64-bit block and a 128-bit key. The only difference between DDO-64V 1 and DDO-64V 2 is the used key scheduling algorithm.…”

“…To overcome these weaknesses of DDPs and update some DDP-based ciphers, variable data-dependent operations (DDOs) (Moldovyan et al, 2004;Moldovyan et al, 2006) that change arbitrarily the weights of transformed binary vectors were developed, and DDO-64 (Moldovyan et al, 2004;Moldovyan et al, 2006) was proposed as an example of the DDObased cipher; there are two versions of DDO-64 according to the key schedule, which are called DDO-64V 1 (Moldovyan et al, 2006) and DDO-64V 2 (Moldovyan et al, 2004). They are both 64-bit block ciphers with a 128-bit key and 8 rounds, which achieve more efficient hardware implementations than the existing DDPbased ciphers.…”

New primitives of controlled elements F2/4 for block ciphers

“…Currently on a mass scale there are available FPGA devices of new generation, which allow essentially improve the performance of information transformation. Earlier in works [1][2][3][4][5][6][7][8][9][10][11][12][13] there was developed an approach to the synthesis of fast cipher oriented to efficient hardware implementation, which is based on applying the data-driven operations that are performed with the controlled substitution-permutation networks (CSPNs). The CSPN-based operating blocks are implemented in the form of a multilayer structure, the active layers of which represent cascades of the controlled elements (CEs) with a two-bit input for data.…”

Cryptanalysis on SDDO-Based BM123-64 Designs Suitable for Various IoT Application Targets

“…Although lots of researchers have focused on how to enhance the security of construction designs using different operations and functions, for instance, DDP (Data-Dependent Permutation) -based ciphers (such as DDP-64 [3], Cobra-family [3] and SCO (Switchable Controlled Operation) -family [2]), DDO (Data-Dependent Operation) -based ciphers (such as MD-64 [4], KT-64 [5], CTPO (Controlled Two-Place Operation) [6] and DDO-64 [7]), and SDDO-based ciphers (such as XO-64 [8] or BMD-128 [9]), their weaknesses have been recently explored with common related attacks. A simple key schedule generator for high speed transformation and lightweight targets can lead to an attack possibility for cryptanalysis using common related-key attack methods.…”