Controlled misfit dislocation technology in strained silicon MOSFETs

Wu, Sean; Wang, Yen Ping; Chang, Shoou Jinn

doi:10.1088/0268-1242/21/1/008

Cited by 10 publications

(6 citation statements)

References 5 publications

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“…[3][4][5][6][7][8]19 The electron overflow and current crowding could be excluded due to same deposition conditions (growth temperature, working pressure, doping concentration, etc.) and LED fabrication process (mesa size, electrode pad size, etc.).…”

Section: Resultsmentioning

confidence: 99%

“…The threshold voltage drop is known to be affected by the following: (i) the electron overflow process, (ii) the current crowding around electrode pads, and (iii) the formation of structural defects, such as the TDs, SFs, and MDs. [3][4][5][6][7][8]19 The electron overflow and current crowding could be excluded due to same deposition conditions (growth temperature, working pressure, doping concentration, etc.) and LED fabrication process (mesa size, electrode pad size, etc.).…”

Section: Resultsmentioning

confidence: 99%

“…[4][5][6] It is known that this leakage path results from various structural defects, such as stacking faults (SFs) and threading dislocations (TDs), and this path is also influenced by the defect generation of misfit dislocations (MDs), etc., in the MQW active region exhibiting a bright emission. [5][6][7][8] The origins of the structural defects within the active region affecting the leakage path can be categorized into the following three defects: SFs, TDs, and MDs. The first type of defect is SFs.…”

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confidence: 99%

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Improvement in Bias Stress Reliability by Barrier Thickness Variation in GaN Based Light-Emitting Diodes

Kong¹,

Cho²,

Jung³

et al. 2011

J. Electrochem. Soc.

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For bias stress reliability testing, InGaN/GaN MQW blue LEDs with different barrier thicknesses were grown by metalorganic chemical vapor deposition. Fast-Fourier-transformed high-resolution transmission electron microscopy was used to analyze the influence of the bias stress reliability with the strain status in the barrier layer. A comparison of the (1100) planar distances showed that a thicker thickness of the barrier layer induced the relaxation of stored strain. A thinner barrier thickness led to the reduced formation of misfit dislocations, which was responsible for the improvement of bias stress reliability of LEDs. These results indicated the importance of delicate control of stored strain in nitride films for improving the reliability and lifetimes of devices.Group III-nitride-based semiconductors are some of the most promising materials for optoelectronic applications, such as lightemitting diodes (LEDs) and laser diodes in the blue and ultraviolet ranges, which can be used in full-color displays, full-color indicators, and as light sources for lamps. 1, 2 Although visible LEDs that have been recently fabricated with GaN epilayers exhibited high power and high brightness for general illumination applications, the issues relating to bias stress reliability, which is related to the efficiency drop from an increase in operating time, should be resolved to guarantee long term stability. 3, 4 Under a long term operation (long duration of applied bias), it is considered that the generation of a leakage path in the localized regions is responsible for the drop in the brightness efficiency, and it also induces an increase in the leakage current level and variation in the threshold voltage (V th ). 4-6 It is known that this leakage path results from various structural defects, such as stacking faults (SFs) and threading dislocations (TDs), and this path is also influenced by the defect generation of misfit dislocations (MDs), etc., in the MQW active region exhibiting a bright emission. [5][6][7][8] The origins of the structural defects within the active region affecting the leakage path can be categorized into the following three defects: SFs, TDs, and MDs. The first type of defect is SFs. They can be easily formed with low formation energy within MQWs, because they are located on the closed packing plane and basal plane. 9 In particular, high indium incorporation in the InGaN layers for a long wavelength emission induces the formation of high density SFs. 9, 10 However, a recently developed epi-growth technique suppresses the formation of the SFs in the active region. The second type of defect is TDs. TDs originating from the film/substrate interface that propagate into the surfaces of whole films by penetrating all the n-and p-type regions play a role in the leakage current. 5, 7 However, most of commercially available GaN epi-layers have a similar TD density of ∼10 9 /cm 2 , thus it is difficult to distinguish the effect of TD density on the leakage current. 5,11 The third type of defect is MDs generated with...

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Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

mentioning

confidence: 99%

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Improvement in Bias Stress Reliability by Barrier Thickness Variation in GaN Based Light-Emitting Diodes

Kong¹,

Cho²,

Jung³

et al. 2011

J. Electrochem. Soc.

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“…CoSi 2 can also be applied to strained-Si devices to further improve the device performance. The tensile-strained-Si MOSFET [4][5][6][7][8], usually fabricated on a relaxed SiGe virtual substrate, has recently gained attention, as it significantly enhances electron mobility and, hence, improves the device performance beyond the scaling limit of conventional CMOS devices. Enhanced electron mobility in strained-Si layers under biaxial tensile strain principally results from reduced intervalley scattering and a reduction in the inplane effective mass.…”

Section: Introductionmentioning

confidence: 99%

Strained-Si nMOSFET with a raised source/drain structure

Lin

Chang

et al. 2008

Semicond. Sci. Technol.

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In this paper, electrical characteristics for strained-Si n-channel metal-oxide-semiconductor field-effect-transistors (nMOSFETs) combining raised source/drain (RSD) structure and cobalt silicide have been studied using the devices with various gate pattern areas (W × L). A strained-Si device with RSD structure provides an additional driving current enhancement (up to 12%) for large-area devices (W × L = 10 × 10 μm 2 ) compared to a strained-Si device without RSD. Further improvement of 24% for device areas down to W × L = 0.15 × 0.15 μm 2 indicates that obvious pattern effects exist in strained-Si without RSD case, which is mainly due to the formation of silicide agglomeration at the source/drain (S/D) region and is responsible for the increased S/D resistance.

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“…The introduction of tensile-strained Si on fully relaxed SiGe virtual substrates for n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) can enhance electron mobility. [2][3][4][5] However, a drawback of these substrates is that SiGe virtual substrate usually accompanies the roughness of SiO 2 /Si interface inheriting from the SiGe graded buffer layer. On the other hand, the use of process-induced stressor engineering has been intensively studied.…”

mentioning

confidence: 99%

Evaluation of Interface Property and DC Characteristics Enhancement in Nanoscale n-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Using Stress Memorization Technique

Huang¹,

Wu²,

Chang³

et al. 2010

Jpn. J. Appl. Phys.

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In this letter, the advanced 40 nm technology n-channel metal–oxide–semiconductor field-effect transistor devices using the stress memorization technique (SMT) are presented. We demonstrate that SMT process would not affect the electrical characteristics of devices and can introduce higher tensile stress on channels, which enhances drive current. Through charge pumping measurement, it can be verified that SMT does not affect Si/SiO2 interface quality. Moreover, SMT-induced higher tensile stress decreases not only scattering coefficient but also tunneling attenuation length, resulting in smaller input-referred noise, which represents an intrinsic advantage of low-frequency noise performance.

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Controlled misfit dislocation technology in strained silicon MOSFETs

Cited by 10 publications

References 5 publications

Improvement in Bias Stress Reliability by Barrier Thickness Variation in GaN Based Light-Emitting Diodes

Improvement in Bias Stress Reliability by Barrier Thickness Variation in GaN Based Light-Emitting Diodes

Strained-Si nMOSFET with a raised source/drain structure

Evaluation of Interface Property and DC Characteristics Enhancement in Nanoscale n-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Using Stress Memorization Technique

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