Controlled Topology of Block Copolymer Gate Insulators by Selective Etching of Cylindrical Microdomains in Pentacene Organic Thin Film Transistors

Jo, Pil Sung; Sung, Jinwoo; Park, Cheolmin; Kim, Eunhye; Ryu, Du Yeol; Pyo, Seungmoon; Kim, Ho Cheol; Hong, Jae Min

doi:10.1002/adfm.200701034

Cited by 32 publications

(18 citation statements)

References 37 publications

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“…In contrast to the present paper, where we directly characterize the buried interface, in those studies the interface roughness has, however, only been inferred from the surface roughness determined before the deposition of the active layer: Steudel et al showed that for pentacene transistors with SiO 2 dielectrics, the decrease of the dielectric/semiconducting interface roughness resulted in a mobility improvement in the devices [57]. A detailed interface roughness vs. mobility investigation was also performed by Jo et al with PS-b-PMMA block copolymer as interface layer on SiO 2 substrates [58]. It clearly showed a dependence of the charge carrier mobility on the interface roughness between pentacene and PS-b-PMMA layer.…”

Section: Resultsmentioning

confidence: 99%

X-ray based tools for the investigation of buried interfaces in organic electronic devices

Neuhold

Brandner

Außerlechner

et al. 2013

Organic Electronics

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Graphical abstractHighlights► We fabricated orthogonal soluble polymer stacks and probed the buried interface by X-ray reflectivity. ► Depending on the used solvent of the organic semiconducting material the interface morphology changed significantly. ► Grazing incidence X-ray diffraction exhibits the molecule alignment in the investigated polymer stack. ► The buried interface roughness within the polymer stack was correlated to the OTFT performance containing the stack.

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Section: Resultsmentioning

confidence: 99%

X-ray based tools for the investigation of buried interfaces in organic electronic devices

Neuhold

Brandner

Außerlechner

et al. 2013

Organic Electronics

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“…Besides surface energy, several other interfacial factors have been shown to have a signifi cant impact on OFET performance, [6][7][8][9][10] namely a) the surface roughness, [27][28][29] b) the surface polarity, [ 30,31 ] c) the roughness (RMSR) of 0.22-0.27 nm (5 × 5 μ m 2 ); furthermore, because the chemical structure of the repeat unit in the chains is identical in each case, these dielectrics have b) similar surface polarity and c) similar values of k (experimental values were in the range 2.1-2.3); and fi nally, according to Marks and co-workers [ 35 , 36 ] the T g,s of a dielectric polymer only behaves as an interfacial factor when the T g,s is lower than the substrate temperature when fabricating the OFET, and this was not the case in our experiments (as shown in Figure S1). As we have excluded any possible effects from other interfacial factors, we can therefore be confi dent that any differences between our OFETs are induced by the variation in dielectric surface energy, which is controlled by the MW of PS.…”

Section: Doi: 101002/adma201004187mentioning

confidence: 99%

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confidence: 99%

Interfacial Heterogeneity of Surface Energy in Organic Field‐Effect Transistors

Sun

Liu

et al. 2011

Advanced Materials

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Organic fi eld-effect transistors (OFETs) have attracted considerable interest because of their potential applications in many fi elds. [1][2][3] A large amount of research has shown that the charge carrier transport in OFETs is extremely dependent on the properties of the interface between the dielectric and semiconductor layers. [ 4 , 5 ] Thus, a clear understanding of the nature of the interfacial effects between the semiconductor and dielectric in OFETs is crucial for fabricating high performance OFETs. To date, although the interfacial effects between the dielectric and semiconductor have been widely studied, [6][7][8][9][10] unfortunately, the conclusions in the published results are often inconsistent or even contradict each other, and the experimental differences in the literature aggravates the confusion concerning the nature of interfacial effects. In previous literature, the interfacial effects have usually been investigated and described with a traditional 'statistic-average' method, which implicitly assumes either that the whole interface has a homogeneity of interfacial states, or that any heterogeneity in interfacial states has no impact on OFET performance. [6][7][8][9][10] However, it has been shown recently that the performance of an OFET is highly sensitive to the presence of heterogeneities in interfacial states, while little dependence on variations in the 'statistical-average' properties has been observed. [11][12][13][14][15] Thus, the neglect of interfacial heterogeneity is a possible source of the inconsistencies and contradictions between previously published results, and a detailed understanding of the interfacial effects induced by the heterogeneous nature of the interface between the dielectric and semiconductor is of great importance in terms of both fundamental science as well as practical applications.The surface energy of the dielectric is one of the interfacial factors that has been considered to have a large impact on the performance of OFETs and has been extensively studied. [16][17][18] In previous literature, the surface energy is usually calculated by measurements of contact angles at different points on the surface. [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23] However contact angle measurements is a 'statistic-average' method that can only indicate differences at a millimeter level, and obviously cannot describe whether or not the interfacial state is homogeneous on the nanometer scale. [16][17][18][19][20][21][22][23] The latter is crucial, because the surface energy of the dielectric mainly infl uences the performances of OFETs at the interface on just such a nanometer scale. [ 6-15 , 19 ] Therefore, the neglect of any such heterogeneity on the nanometer scale may be the source of the inconsistencies and contradictions between previously published results. In this paper, the relation between heterogeneous surface energy and performances of OFETs has been investigated. It is found that the interfacial heterogeneity of the surface energy has a high...

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“…[ 10,11 ] The use of these substrate materials offers opportunities for a variety of novel applications, but they are usually characterized by a larger surface roughness than conventional substrate materials, and this can have detrimental effects on the performance of the devices. [ 12–26 ]…”

Section: Introductionmentioning

confidence: 99%

Effect of the Degree of the Gate‐Dielectric Surface Roughness on the Performance of Bottom‐Gate Organic Thin‐Film Transistors

Geiger

Acharya

Reutter

et al. 2020

Adv Materials Inter

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In organic thin‐film transistors (TFTs) fabricated in the inverted (bottom‐gate) device structure, the surface roughness of the gate dielectric onto which the organic‐semiconductor layer is deposited is expected to have a significant effect on the TFT characteristics. To quantitatively evaluate this effect, a method to tune the surface roughness of a gate dielectric consisting of a thin layer of aluminum oxide and an alkylphosphonic acid self‐assembled monolayer over a wide range by controlling a single process parameter, namely the substrate temperature during the deposition of the aluminum gate electrodes, is developed. All other process parameters remain constant in the experiments, so that any differences observed in the TFT performance can be confidently ascribed to effects related to the difference in the gate‐dielectric surface roughness. It is found that an increase in surface roughness leads to a significant decrease in the effective charge‐carrier mobility and an increase in the subthreshold swing. It is shown that a larger gate‐dielectric surface roughness leads to a larger density of grain boundaries in the semiconductor layer, which in turn produces a larger density of localized trap states in the semiconductor.

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Controlled Topology of Block Copolymer Gate Insulators by Selective Etching of Cylindrical Microdomains in Pentacene Organic Thin Film Transistors

Cited by 32 publications

References 37 publications

X-ray based tools for the investigation of buried interfaces in organic electronic devices

X-ray based tools for the investigation of buried interfaces in organic electronic devices

Interfacial Heterogeneity of Surface Energy in Organic Field‐Effect Transistors

Effect of the Degree of the Gate‐Dielectric Surface Roughness on the Performance of Bottom‐Gate Organic Thin‐Film Transistors

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