Cooperative communication based barrier synchronization in on-chip mesh architectures

Abstract

Abstract:We propose cooperative communication as a means to enable efficient and scalable barrier synchronization on mesh-based manycore architectures. Our approach is different from but orthogonal to conventional algorithm-based optimizations. It relies on collaborating routers to provide efficient gather and multicast communication. In conjunction with a master-slave algorithm, it exploits the mesh regularity to achieve efficiency. The gather and multicast functions have been implemented in our router. Synthesis results suggest marginal area overhead. With synthetic and benchmark experiments, we show that our approach significantly reduces synchronization completion time and increases speedup.

Efficient distributed memory management in a multi-core H.264 decoder on FPGA

“…DME was first introduced to support flexible distributed shared memory management on multi-core NoC in [I]. It off-loads DSM management from the main-processor and has been used for a range of different applications and in different ways [6,7,8].…”