CoQoS: Coordinating QoS-aware shared resources in NoC-based SoCs

Li, Bin; Zhao, Li; Iyer, Ravi; Peh, Li-Shiuan; Leddige, Michael; Espig, M A; Lee, Seung Eun; Newell, Don

doi:10.1016/j.jpdc.2010.10.013

Cited by 45 publications

(27 citation statements)

References 35 publications

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“…With QoS-enforcing hardware, these techniques could coschedule workloads much more aggressively, relying on hardware to prevent interference. Hardware-based QoS enforcement: Prior work has proposed hardware schemes to partition shared resources [9,16,21,25,38,45], as well as software QoS frameworks that leverage these mechanisms to implement fairness, maximize throughput, or provide differentiated service [5,13,17,20,29,31,37,42,49,61]. However, these techniques have been developed with the goal of meeting long-term performance goals (e.g., IPC or queries per second over billions of instructions), instead of providing strict guarantees on worst-case, shortterm behavior (e.g., bounding the performance degradation of a 1 ms request).…”

Section: Quality Of Service In Cmpsmentioning

confidence: 99%

“…In particular, CoQoS [29] and METE [49] combine cache and bandwidth partitioning mechanisms to provide endto-end performance guarantees. As discussed before, these guarantees are only on long-term performance.…”

Section: Cache Partitioning In Cmpsmentioning

confidence: 99%

“…These schemes often avoid interference, but do not prevent it. On the other hand, prior work has introduced hardware to explicitly par-tition shared resources [9,16,21,25,38,45], and frameworks that manage these resources dynamically to provide QoS [5,13,17,29,31,37,42,49,61]. However, all these techniques only provide guarantees on long-term average performance (e.g., IPC or queries per second over billions of instructions), instead of on worst-case, short-term behavior.…”

Section: Introductionmentioning

confidence: 99%

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Ubik

Kasture

Sánchez

2014

Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems

115

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Chip-multiprocessors (CMPs) must often execute workload mixes with different performance requirements. On one hand, user-facing, latency-critical applications (e.g., web search) need low tail (i.e., worst-case) latencies, often in the millisecond range, and have inherently low utilization. On the other hand, compute-intensive batch applications (e.g., MapReduce) only need high long-term average performance. In current CMPs, latency-critical and batch applications cannot run concurrently due to interference on shared resources. Unfortunately, prior work on quality of service (QoS) in CMPs has focused on guaranteeing average performance, not tail latency.In this work, we analyze several latency-critical workloads, and show that guaranteeing average performance is insufficient to maintain low tail latency, because microarchitectural resources with state, such as caches or cores, exert inertia on instantaneous workload performance. Last-level caches impart the highest inertia, as workloads take tens of milliseconds to warm them up. When left unmanaged, or when managed with conventional QoS frameworks, shared last-level caches degrade tail latency significantly. Instead, we propose Ubik, a dynamic partitioning technique that predicts and exploits the transient behavior of latency-critical workloads to maintain their tail latency while maximizing the cache space available to batch applications. Using extensive simulations, we show that, while conventional QoS frameworks degrade tail latency by up to 2.3×, Ubik simultaneously maintains the tail latency of latency-critical workloads and significantly improves the performance of batch applications.

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Section: Quality Of Service In Cmpsmentioning

confidence: 99%

Section: Cache Partitioning In Cmpsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Ubik

Kasture

Sánchez

2014

Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems

115

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“…QoS has been proposed in [14], [17], and [18] in order to combine best-effort (BE) and guaranteed throughput (GT) streams with time division multiple access (TDMA), to distinguish between traffic classes [19], [20], to map multiple use-cases in worst-case scenarios [21], [22], and to improve the access to shared resources [23], such as external memories [24], [25] in order to fulfill latency and bandwidth bounds.…”

Section: Related Workmentioning

confidence: 99%

QoS-Driven Reconfigurable Parallel Computing for NoC-Based Clustered MPSoCs

Joven

Bagdia

Angiolini³

et al. 2013

IEEE Trans. Ind. Inf.

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Abstract-Reconfigurable parallel computing is required to provide high-performance embedded computing, hide hardware complexity, boost software development, and manage multiple workloads when multiple applications are running simultaneously on the emerging network-on-chip (NoC)-based multiprocessor systems-on-chip (MPSoCs) platforms. In these type of systems, the overall system performance may be affected due to congestion, and therefore parallel programming stacks must be assisted by quality-of-service (QoS) support to meet application requirements and to deal with application dynamism.In this paper, we present a hardware-software QoS-driven reconfigurable parallel computing framework, i.e., the NoC services, the runtime QoS middleware API and our ocMPI library and its tracing support which has been tailored for a distributed-shared memory ARM clustered NoC-based MPSoC platform.The experimental results show the efficiency of our software stack under a broad range of parallel kernels and benchmarks, in terms of low-latency interprocess communication, good application scalability, and most important, they demonstrate the ability to enable runtime reconfiguration to manage workloads in message-passing parallel applications.Index Terms-Networks-on-chip (NoCs), NoC-based multiprocessor systems-on-chip (MPSoC), parallel computing, quality of service (QoS), runtime reconfiguration.

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“…Many approaches have been proposed in the past to augment NoCs with mechanisms to provide the desired QoS on the individual transaction, but they typically assume that traffic flows can be somehow categorized within a few classes with predetermined priorities [13,14]. In short, they do not face the problem of how this information can be forwarded from the programming model to physical packets.…”

Section: Introductionmentioning

confidence: 99%

An integrated, programming model-driven framework for NoC–QoS support in cluster-based embedded many-cores

Joven

Marongiu

Angiolini³

et al. 2013

Parallel Computing

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a b s t r a c tEmbedded SoC designs are embracing the many-core paradigm to deliver the required performance to run an ever-increasing number of applications in parallel. Networks-on-Chip (NoC) are considered as a convenient technology to implement many-core embedded platforms. The complex and non-uniform nature of the traffic flows generated when multiple parallel applications are running simultaneously calls for Quality-of-Service (QoS) extensions in the NoC, but to efficiently exploit similar services it is necessary to expose them to the software in a easy-to-use yet efficient manner. In this paper we present an integrated hardware/software approach for delivering QoS on top of an hybrid OpenMP-MPI parallel programming model. Our experimental results show the effectiveness of our proposal over a broad range of benchmarks and application mappings, demonstrating the ability to manage parallelism under QoS requirements effortlessly from the programming model.

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CoQoS: Coordinating QoS-aware shared resources in NoC-based SoCs

Cited by 45 publications

References 35 publications

Ubik

Ubik

QoS-Driven Reconfigurable Parallel Computing for NoC-Based Clustered MPSoCs

An integrated, programming model-driven framework for NoC–QoS support in cluster-based embedded many-cores

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