Coupling effects in the time domain for an interconnecting bus in high-speed GaAs logic circuits

Chilo, J.; Arnaud, T.

doi:10.1109/t-ed.1984.21526

Cited by 54 publications

(10 citation statements)

References 9 publications

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“…To suppress crosstalk even further, some studies have proposed using a guard trace, which is one extra trace without any signal between two coupling signal traces [11,[14][15][16][17]. As the guard trace acts as a transmission line, it cannot remain at ground potential throughout its entire length [23].…”

Section: Guard Tracementioning

confidence: 99%

“…However, because the remaining 30% flux boundary can still negatively affect the signal quality in high-speed, high-density, space-limited, low-voltage PCB designs, the addition of a guard trace that carries no signal has been proposed to reduce the noise induced in a victim by the aggressor and avoid crosstalk [11,[14][15][16][17]. A guard trace that is left unterminated (i.e., open termination) will experience noise and act as a potential source of noise for the victim [11,17].…”

Section: Introductionmentioning

confidence: 99%

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Suppression of Crosstalk Using Serpentine Guard Trace Vias

Huang

Lu²,

Lin³

2010

PIER

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Abstract-The reliability of circuits on printed circuit boards (PCBs) in many modern electronic products is affected by severe noise caused by high-speed and low-voltage operation as well as layout constraints compounded by limited space and high circuit density. Crosstalk is a major noise source that interferes with the signal integrity (SI) in poor PCB layout designs. One common method of reducing crosstalk is the three-width (3-W ) rule. The serpentine guard trace (SGT) approach has also been used to reduce crosstalk using two terminal matching resistors on the SGT between the aggressor and victim. Although the SGT approach suppresses far-end crosstalk (FEXT) at the expense of more layout space, it also neglects interference caused by near-end crosstalk (NEXT). In this study, we propose the SGT via (SGTV) approach in which grounded vias are added to the SGT at appropriate locations, and the ratio between the lengths of the horizontal and vertical sections of the guard trace is adjusted to minimize NEXT and FEXT. Frequency domain simulated (measured) results showed that the SGTV approach reduced NEXT by 3.7 (7.65) and 0.83 (1.6) dB as well as FEXT by 5.11 (7.22) and 0.1 (1.98) dB compared to the 3-W and SGT approaches, respectively. In the time domain, simulated (measured) results showed that SGTV reduced NEXT by 34.67% (49.8%) and 27.5% (26.65%) as well as FEXT by 46.78% (56.52%) and 6.91% (24.8%) compared to the 3-W and SGT approaches, respectively. Our proposed approach thus effectively suppresses both NEXT and FEXT to achieve better SI in PCB layout designs than the other two methods. As our design uses two grounded vias instead of two guard trace terminators and does not require extra components, it is less costly than SGT. Our simulated and measured results indicate that our approach is suitable for practical application because of the lower cost and the ease of implementation that eliminates NEXT and FEXT.

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Section: Guard Tracementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Suppression of Crosstalk Using Serpentine Guard Trace Vias

Huang

Lu²,

Lin³

2010

PIER

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“…Another technique to reduce the crosstalk noise is the placement of guard trace, i.e., to shield the coupling between adjacent signal lines by inserting a grounded trace [7], [8]. Intuitively, it blocks a significant part of the mutual coupling, thus being capable of suppressing both the NEXT and FEXT.…”

Section: Introductionmentioning

confidence: 99%

Enhanced Microstrip Guard Trace for Ringing Noise Suppression Using a Dielectric Superstrate

Yao

Guo

Hung

et al. 2010

IEEE Trans. Adv. Packag.

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-Grounded guard traces are increasingly used to reduce the coupling-induced crosstalk, but the incurred ringing noise will strongly limit the performance for the microstrip structures. This paper describes the generation mechanism of the ringing noise and derives an analytical formula of the noise magnitude. Besides, an enhanced microstrip guard trace design is proposed to eliminate the ringing noise by covering the original microstrip structure with a superstrate of higher permittivity. A design space versus the superstrate thickness and the dielectric constant are constructed and in which, the guard trace needs be grounded at the two ends only without causing any ringing noise. Finally, the time-domain simulations and experiments are performed to verify the proposed concept.Index Terms -crosstalk noise, ringing noise, guard trace, noise suppression, dielectric superstrate, signal integrity.

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“…Although considerable amount of work has been done in recent years on the computation on the propagation characteristics of multiple coupled strip lines, a small number [1][2][3][4][5][6][7][8][9][10][11][12] of researchers have dealt with some aspects of the problem of calculation of the self and mutual line constants of on-chip interconnections, and a very limited number [3][4][5][6][7][8][9][10][11][12][13][14][15][16] has tackled the problem of 3-D multilevel metallization structures. 199 The purpose of this work is the detailed presentation of a self contained method developed 17 for the electrical modelling of lossy-coupled multilayer on-chip interconnection lines at high bit rates, which can be used by the VLSI designer in conjunction with existing electrical simulation packages.…”

Section: Introductionmentioning

confidence: 99%