Cryogenic PIM: Challenges &amp; Opportunities

Resch, Salonik; Cılasun, Hüsrev; Karpuzcu, Ulya R.

doi:10.1109/lca.2021.3077536

Cited by 12 publications

(9 citation statements)

References 31 publications

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“…Lee et al [38] found out the critical reliability issue in cryogenic DRAM running showed the solutions. Resch et al [53] and Alam et al [3] and Hou et al [24] showed the cryogenic PIM architecture to resolve the memory wall. Sanuki et al [55] and Aiba et al [2] developed 3D flash prototype for cryogenic computing and showed the potential of higher endurance, capacity, and speed-up.…”

Section: Related Workmentioning

confidence: 99%

CryoWire: wire-driven microarchitecture designs for cryogenic computing

Min

Chung

Byun

et al. 2022

Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

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Cryogenic computing, which runs a computer device at an extremely low temperature, is promising thanks to its significant reduction of wire resistance as well as leakage current. Recent studies on cryogenic computing have focused on various architectural units including the main memory, cache, and CPU core running at 77K. However, little research has been conducted to fully exploit the fast cryogenic wires, even though the slow wires are becoming more serious performance bottleneck in modern processors. In this paper, we propose a CPU microarchitecture which extensively exploits the fast wires at 77K. For this goal, we first introduce our validated cryogenic-performance models for the CPU pipeline and network on chip (NoC), whose performance can be significantly limited by the slow wires. Next, based on the analysis with the models, we architect CryoSP and CryoBus as our pipeline and NoC designs to fully exploit the fast wires. Our evaluation shows that our cryogenic computer equipped with both microarchitectures achieves 3.82 times higher system-level performance compared to the conventional computer system thanks to the 96% higher clock frequency of CryoSP and five times lower NoC latency of CryoBus. CCS CONCEPTS• Computer systems organization → Superscalar architectures; Pipeline computing; Multicore architectures.

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Section: Related Workmentioning

confidence: 99%

CryoWire: wire-driven microarchitecture designs for cryogenic computing

Min

Chung

Byun

et al. 2022

Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

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“…Nano-satellites, on the other hand, typically do not have suicient resources for any temperature modulation yet they need to operate properly across a wide range of temperatures. Non-volatile memory characteristics are very sensitive to temperature [108], which further challenges this situation for MOUSE.…”

Section: Temperaturementioning

confidence: 99%

“…Hence, the overall energy eiciency of SHE still decreases. As a result, PIM using MTJs (or other non-volatile technologies, as well) is less energy eicient at cold temperatures [108]. However, the change is modest, within approximately 10% more energy consumption (relative to room temperature), even at cryogenic (77K) temperatures [108].…”

Section: Temperaturementioning

confidence: 99%

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Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions

Resch

Khatamifard

Chowdhury

et al. 2022

ACM Trans. Embed. Comput. Syst.

Self Cite

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Beyond edge devices can operate outside the reach of the power grid and without batteries. Such devices can be deployed in large numbers in regions which are difficult to access. Using machine learning, these devices can solve complex problems and relay valuable information back to a host. Many such devices deployed in low earth orbit can even be used as nano-satellites. Due to the harsh and unpredictable nature of the environment, these devices must be highly energy efficient, be capable of operating intermittently over a wide temperature range, and be tolerant of radiation. Here, we propose a non-volatile processing-in-memory (PIM) architecture which is extremely energy efficient, supports minimal overhead checkpointing for intermittent computing, can operate in a wide range of temperatures, and has a natural resilience to radiation.

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“…Cryogenic electronics is an emerging approach to improve computer performance and deal with the static power consumption issue resulting from transistor scaling towards the end of Moore's law [1][2][3]. MOS technology operating at cryogenic temperatures provides some benefits, such as steeper subthreshold slope, increased carrier mobility, and increased saturation velocity, leading to semiconductor-based circuits with faster operation, reduced leakage, and improved energy-efficiency [4,5].…”

Section: Introductionmentioning

confidence: 99%

Embedded Memories for Cryogenic Applications

2021

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The ever-growing interest in cryogenic applications has prompted the investigation for energy-efficient and high-density memory technologies that are able to operate efficiently at extremely low temperatures. This work analyzes three appealing embedded memory technologies under cooling—from room temperature (300 K) down to cryogenic levels (77 K). As the temperature goes down to 77 K, six-transistor static random-access memory (6T-SRAM) presents slight improvements for static noise margin (SNM) during hold and read operations, while suffering from lower (−16%) write SNM. Gain-cell embedded DRAM (GC-eDRAM) shows significant benefits under these conditions, with read voltage margins and data retention time improved by about 2× and 900×, respectively. Non-volatile spin-transfer torque magnetic random access memory (STT-MRAM) based on single- or double-barrier magnetic tunnel junctions (MTJs) exhibit higher read voltage sensing margins (36% and 48%, respectively), at the cost of longer write access time (1.45× and 2.1×, respectively). The above characteristics make the considered memory technologies to be attractive candidates not only for high-performance computing, but also enable the possibility to bridge the gap from room-temperature to the realm of cryogenic applications that operate down to liquid helium temperatures and below.

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Cryogenic PIM: Challenges & Opportunities

Cited by 12 publications

References 31 publications

CryoWire: wire-driven microarchitecture designs for cryogenic computing

CryoWire: wire-driven microarchitecture designs for cryogenic computing

Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions

Embedded Memories for Cryogenic Applications

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