Cu Bump Interconnections in 20.MU.m-Pitch at Low Temperature Utilizing Electroless Tin-Plating on 3D Stacked LSI.

Tomita, Yoshihiro; Morifuji, Tadahiro; Tomisaka, Manabu; Sunohara, Masahiro; Nemoto, Y.; Sato, Tomotoshi; Takahashi, Kenji; Bonkohara, Manabu

doi:10.1252/jcej.36.119

Cited by 10 publications

(7 citation statements)

References 3 publications

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“…[2][3][4] The chip to chip bonding process using Cu bump with Sn-Ag alloy capping layer was developed by the Association of Super-Advanced Electronic Technologies. 4,5 This method was preconditioned with the Ar sputtering cleaning to reduce oxide layers and contaminations of bump surfaces. However, expensive Ar cleaning made the process cost high.…”

Section: Introductionmentioning

confidence: 99%

Contact resistance and shear strength of the solder joints formed using Cu bumps capped with Sn or Ag/Sn layer

Lee

Roh

Chen

et al. 2005

Journal of Elec Materi

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Solder joints were successfully bonded by joining Ag/Sn/Cu bumps and Ag/Sn/Cu layers at 200°C for 30 sec under 20 MPa, 40 MPa, and 80 MPa using thermo-compression bonder. The solder joints were aged at 150°C up to 1000 h. The strength of the solder joints was measured by the shear test and the contact resistance was measured using four-point probe method. The microstructure of the solder joints and the fracture modes after shear test were analyzed by scanning electron microscopy (SEM) with the energy-dispersive spectrometry (EDS). Results showed that the electrical resistance of the solder joints decreased, and the shear strength of the solder joints increased after aging treatment. The fracture modes were observed to move from the interfacial failure between solder and intermetallic compounds (IMCs) to the interfacial failure between IMCs. It was considered that the transition of fracture modes was closely related with the microstructure evolution of the solder joints, especially the transformation of IMC phases during the aging treatment.

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Section: Introductionmentioning

confidence: 99%

Contact resistance and shear strength of the solder joints formed using Cu bumps capped with Sn or Ag/Sn layer

Lee

Roh

Chen

et al. 2005

Journal of Elec Materi

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“…Voids can occur in the as-bonded condition due to oxidation and roughness of the bonding surface. 12,13,17 However, voids were not observed in this experiment since melted Sn easily filled the gaps. Also, aging did not induce void formation since the solder joints completely transformed to the Cu 3 Sn phase during liquid phase bonding.…”

Section: Chip To Chip Bonding Using Cu Bumps Capped With Thin Sn Layementioning

confidence: 67%

“…For vertical interconnection between chips, Cu to Cu bonding with a thin solder capping layer has been adapted for 3D chip stacking. 3,4,[8][9][10][11][12][13] During bonding, various microstructures, consisting of Sn, Cu 6 Sn 5 , or Cu 3 Sn phases, can be formed in the solder joints depending on the bonding conditions due to the use of a thin Sn solder capping layer. 3,4,6,[9][10][11][12] The microstructure of the solder joints is believed to have a significant influence on the reliability.…”

Section: Introductionmentioning

confidence: 99%

Chip to Chip Bonding Using Cu Bumps Capped with Thin Sn Layers and the Effect of Microstructure on the Shear Strength of Joints

Kim

Woo

Kim

2014

Journal of Elec Materi

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Chip to chip bonding techniques using Cu bumps capped with thin solder layers have been frequently applied to 3D chip stacking technology. We studied the effect of joint microstructure on shear strength. Joints were formed by joining Sn/Cu bumps on a Si die and Sn/Cu layers on another Si die at 245-330°C using a thermo-compression bonder. Three different types of microstructures were fabricated in the joints by controlling the bonding temperature and time, (1) a Sn-rich phase with a Cu 6 Sn 5 phase at the Cu interfaces, (2) a Cu 6 Sn 5 phase in the interior with a Cu 3 Sn phase at the Cu interfaces, and (3) one single Cu 3 Sn phase throughout the whole joint. The joint having a single Cu 3 Sn phase had the highest shear strength. Specimens were aged up to 2000 h at 150°C and 180°C. During aging, the microstructures of all joints were transformed in a single Cu 3 Sn phase. The shear strength of the joints was very sensitive to the formation of Cu 3 Sn and microvoids. Microvoids formed in the solder joints with a Cu 6 Sn 5 phase with and without a Sn-rich phase during aging and decreased the shear strength of the joints. Conversely, aging did not induce the formation of microvoids in the joints which originally had only a Cu 3 Sn phase and the shear strength was not decreased.

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“…Usually, microbumps and solder-bumps are used for flip-chip bonding of chip-to-substrate interconnects. [2][3][4] When using solder-bumps for interconnects, the bump shape is affected by the reflow process, and decreasing the bump pitch is not easy. On the other hand, it is easy to attain a high-density pad pitch of microbumps, though obtaining bump arrays with a uniform bump height is essential.…”

Section: Introductionmentioning

confidence: 99%

Formation of Au Microbump Arrays for Flip-Chip Bonding Using Electroless Au Deposition from a Non-Cyanide Plating Bath

Yokoshima

Nomura

Yamaji

et al. 2009

Transactions of The Japan Institute of Electronics Packaging

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The formation of Au microbump arrays for flip-chip bonding was investigated using an electroless Au plating bath. Generally, electroless Au deposition gives a low deposition rate, preventing the fabrication of Au bumps with heights of more than 5 μm. To overcome this problem, we developed a new electroless Au deposition process that employs a non-cyanide bath. This process delivers a high deposition rate, especially for fine bump patterns (bumps of less than 10 μm in diameter). Au bumps with a diameter and height of 10 μm each could be fabricated with a high deposition rate using the new electroless Au plating bath. Moreover, Au microbump arrays were successfully fabricated on Cu wiring. The practical feasibility of this technique was demonstrated by forming arrays with bump heights and bump diameters of 10 μm each and an array pitch of 30 μm. All film-formation processes were performed under cyanide-free conditions; thus, this process has a high industrial potential for fabricating ultra-fine Au microbump arrays.

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Cu Bump Interconnections in 20.MU.m-Pitch at Low Temperature Utilizing Electroless Tin-Plating on 3D Stacked LSI.

Cited by 10 publications

References 3 publications

Contact resistance and shear strength of the solder joints formed using Cu bumps capped with Sn or Ag/Sn layer

Contact resistance and shear strength of the solder joints formed using Cu bumps capped with Sn or Ag/Sn layer

Chip to Chip Bonding Using Cu Bumps Capped with Thin Sn Layers and the Effect of Microstructure on the Shear Strength of Joints

Formation of Au Microbump Arrays for Flip-Chip Bonding Using Electroless Au Deposition from a Non-Cyanide Plating Bath

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