Current Feedback Linearization Applied to Oscillator Based ADCs

Voelker, Matthias; Pashmineh, Sara; Hauer, Johann; Ortmanns, Maurits

doi:10.1109/tcsi.2014.2327302

Cited by 27 publications

(9 citation statements)

References 14 publications

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“…This suggests that the direct current mode control is the best. Finally, some authors claim that the oscillation frequency is proportional to the ratio of the two [7, eq (10)] and [5, eqn (2)], which does not directly lead to a simple drive strategy.…”

Section: Ring Oscillator (Ro) Input Circuitmentioning

confidence: 99%

“…Introduction: Voltage-controlled oscillator (VCO)-based analogueto-digital (A/D) conversion has recently attracted a lot of interest since it allows relatively easy implementation of multi-bit noise shaping A/D conversion. Both closed-loop as well as open-loop implementations have been presented [1][2][3][4][5][6]. However, whichever overall architecture is used, a key issue is the overall linearity of the actual VCO that is used as the quantiser.…”

mentioning

confidence: 99%

“…Most researchers have tried to solve this issue at the architectural level, e.g. by calibration, feedback or signal swing reduction [4][5][6]. In this Letter, we follow a complementary approach, in the sense that we perform a circuit level optimisation of the VCO core.…”

mentioning

confidence: 99%

“…This leads to the conclusion that direct voltage mode control is the optimal choice. Other authors claim that the oscillation frequency is proportional to the current driven into the control terminal [5,2,Fig. 4].…”

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confidence: 99%

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Highly linear VCO for use in VCO‐ADCs

Babaie-Fishani

Rombouts

2016

Electron. lett.

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This brief presents a very simple Ring-Oscillator VCO structure for use in VCO-ADC applications. It has a greatly improved linearity compared to previously published VCO's. Measurement results of a 1Volt, 65nm CMOS prototype confirm the effectiveness of the proposed approach.Introduction: VCO based Analog to Digital conversion has recently gained a lot of interest, because it allows relatively easy implementation of multi-bit noise shaping A/D conversion. Both closed-loop as well as open-loop implementations have been presented [1,2,3,4,5,6]. However, whichever overall architecture is used, a key issue is the overall linearity of the actual VCO that is used as the quantiser. Most researchers have tried to solve this issue at the architectural level e.g. by calibration, feedback or signal swing reduction [4,5,6]. In this work, we follow a complementary approach, in the sense that we have performed a circuit level optimization of the VCO core. The resulting VCO is typically an order of magnitude more linear than prior VCO designs [2,3,4]. As a result further linearity correction at the architectural level may have become unnecessary or can significantly be simplified.

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Section: Ring Oscillator (Ro) Input Circuitmentioning

confidence: 99%

mentioning

confidence: 99%

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confidence: 99%

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confidence: 99%

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Highly linear VCO for use in VCO‐ADCs

Babaie-Fishani

Rombouts

2016

Electron. lett.

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“…Nevertheless, this approach can only support limited input swing as to avoid turning on the bulk diode, and has only been demonstrated under a 0.2-V-supplied design. Voelker et al [6] identified that the finite input impedance and the short circuit current during transition is two major sources of non-linearity for a drain-injected current-controlled oscillator (CCO). They implemented a feedback loop to reduce the input impedance and developed a break-before-make delay cell topology to reduce the shoot through current, allowing the ADC to achieve 83-dBc supurious-free-dynamic-range (SFDR) with 1-V PP input swing.…”

Section: Open-loop Ct Vco-based Adcmentioning

confidence: 99%

Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs

Sanyal

Lee

et al. 2019

IEICE Trans. Electron.

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Ring voltage-controlled-oscillators (VCOs) are increasingly being used to design ΔΣ ADCs. They have the merits of simple, highly digital and low-voltage tolerant, making them attractive alternatives for the classic scaling-unfriendly operational-amplifier-based methodology. This paper aims to provide a summary on the advancement of VCObased ΔΣ ADCs. The scope of this paper includes the basics and motivations behind the VCO-based ADCs, followed by a survey covering a wide range of architectures and circuit techniques in both continuous-time (CT) and discrete-time (DT) implementation, and will discuss the key insights behind the contributions and drawbacks of these architectures.

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Area‐efficient ultra‐wide‐tuning‐range ring oscillators in 65‐nm complementary metal–oxide–semiconductor

Yang,

Chen,

Cheng

et al. 2024

Circuit Theory & Apps

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In this paper, to analyze the tuning range (TR) of transistors, we introduced two streamlined modeling approaches that can precisely predict the extent and direction of the TR. The first approach, known as the average DC (Id) method, employed a simplified circuit model to dissect transistor characteristics, enabling us to understand the general trajectory of the TR. The second approach involved the transient current Id (tc) method, which offers a nuanced portrayal of the transistor's real‐world performance. By analyzing the current fluctuations within the transistor during transient states, its tuning capabilities could be more accurately ascertained. Further, this paper presents several designs for ultra‐wide‐tuning‐range complementary metal–oxide–semiconductor (CMOS) voltage‐controlled oscillators (VCOs) that employ a novel two‐mode current‐starved delay cell, featuring a tunable transistor‐based current source for coarse frequency adjustment operating in synergy with a varactor for precise tuning. Using the 65‐nm CMOS process, three prototype VCOs (Designs 2/3/4) based on the new cell and targeting different numbers of phases and performance were fabricated, thoroughly characterized, and compared with their traditional inverter‐based counterpart (Design 1). Design 1 featured an inverter‐based four‐phase structure, with an output frequency range of 3.14–9.82 GHz, i.e., a radio frequency (RF) TR of 103%, with phase noise (PN) ranging from 137.7 to 132.1 dBc/Hz at an offset of 100 MHz, figure of merit with tuning range and area (FoMTA) varying from 200.7 to 205.1 dBc/Hz, and area of 0.0036 mm2. In contrast, Designs 2/3/4, based on the new delay cell, featured 8/3/4 phases, with output frequencies in the ranges of 1.14–9.17, 1.26–16.53, and 1.15–18.32 GHz, respectively, resulting in increased RF TRs of 155.8%, 171.7% and 176.4%, as well as PN at an offset of 100 MHz in the ranges of 142.1–138, 130.5–131.3, and 131.9–129.6 dBc/Hz, respectively. This yielded better FoMTAs in the ranges of 201.2–209.9, 205.3–217.9, and 194.1–209.9 dBc/Hz, thus allowing the VCOs to maintain consistent performance across the frequency band and occupy comparable or smaller silicon areas of 0.00425, 0.000972, and 0.00348 mm2 in the same 65 nm technology. These designs showcase the versatility and efficiency of the two‐mode current‐starved delay architecture, which offers wide TRs, tiny areas, and competitive performance metrics for various applications in RF integrated circuits.

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Current Feedback Linearization Applied to Oscillator Based ADCs

Cited by 27 publications

References 14 publications

Highly linear VCO for use in VCO‐ADCs

Highly linear VCO for use in VCO‐ADCs

Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs

Area‐efficient ultra‐wide‐tuning‐range ring oscillators in 65‐nm complementary metal–oxide–semiconductor

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