This brief presents a very simple Ring-Oscillator VCO structure for use in VCO-ADC applications. It has a greatly improved linearity compared to previously published VCO's. Measurement results of a 1Volt, 65nm CMOS prototype confirm the effectiveness of the proposed approach.Introduction: VCO based Analog to Digital conversion has recently gained a lot of interest, because it allows relatively easy implementation of multi-bit noise shaping A/D conversion. Both closed-loop as well as open-loop implementations have been presented [1,2,3,4,5,6]. However, whichever overall architecture is used, a key issue is the overall linearity of the actual VCO that is used as the quantiser. Most researchers have tried to solve this issue at the architectural level e.g. by calibration, feedback or signal swing reduction [4,5,6]. In this work, we follow a complementary approach, in the sense that we have performed a circuit level optimization of the VCO core. The resulting VCO is typically an order of magnitude more linear than prior VCO designs [2,3,4]. As a result further linearity correction at the architectural level may have become unnecessary or can significantly be simplified.

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In this paper, we propose to study voltage controlled oscillators (VCOs) based on the equivalence with pulse frequency modulators (PFMs). This approach is applied to the analysis of VCO-based analog-to-digital converters (VCO-ADCs) and deviates significantly from the conventional interpretation, where VCO-ADCs have been described as the first-order modulators. A first advantage of our approach is that it unveils systematic error components not described by the equivalence with a conventional modulator. A second advantage is that, by a proper selection of the pulses generated by the PFM, we can theoretically construct an open loop VCO-ADC with an arbitrary noise shaping order. Unfortunately, with the exception of the firstorder noise shaping case, the required pulse waveforms cannot easily be implemented on the circuit level. However, we describe circuit techniques to achieve a good approximation of the required pulse waveforms, which can easily be implemented by practical circuits. Finally, our approach enables a straightforward description of multistage modulator architectures, which is an alternative and practically feasible way to realize a VCO-ADC with extended noise shaping.

In this paper we describe the system architecture and prototype measurements of a MEMS gyroscope system with a resolution of 0.025The architecture makes extensive use of control loops, which are mostly in the digital domain. For the primary mode both the amplitude and the resonance frequency are tracked and controlled. The secondary mode readout is based on unconstrained Σ∆ force-feedback, which does not require a compensation filter in the loop and thus allows more beneficial quantization noise shaping than prior designs of the same order. Due to the force-feedback, the gyroscope has ample dynamic range to correct the quadrature error in the digital domain. The largely digital set-up also gives a lot of flexibility in characterization and testing, where system identification techniques have been used to characterize the sensors. This way, a parasitic direct electrical coupling between actuation and readout of the mass-spring systems was estimated and corrected in the digital domain. Special care is also given to the capacitive readout circuit, which operates in continuous time.

Nowadays, 61-modulation is a widely used technique for analog-to-digital (A/D) conversion, especially when aiming for high resolutions. While being applied initially for purely electrical A/D converters, its application has been expanded to mixed mechanical-electrical systems. This has led to the use of 61 force-feedback for digital readout of high-performance inertial sensors. However, compared with their electrical counterpoint, 61 force-feedback loops often have to deal with three additional issues: 1) an increased stability problem due to phase-lag occurring in the sensor; 2) the injection of relatively high levels of readout noise in the loop; and 3) the lack of degrees-of-freedom of many 61 force-feedback architectures for implementing an arbitrary noise transfer function. As a result, 61 force-feedback loops found in literature are designed in a much less systematic way as compared with electrical 61 modulators. In this paper, we address these issues and propose a new unconstrained architecture. Based on this architecture, we are able to present a systematic approach for designing 61 force-feedback loops. Additionally, the main strengths and weaknesses of different 61 force-feedback architectures are discussed. Index Terms-A/D-conversion, force-feedback, MEMS inertialsensors, sigma-delta (61) modulation, systematic design.