Current Saturation in Submicrometer Graphene Transistors with Thin Gate Dielectric: Experiment, Simulation, and Theory

Abstract

Recently, graphene field-effect transistors (FET) with cutoff frequencies (f(T)) between 100 and 300 GHz have been reported; however, the devices showed very weak drain current saturation, leading to an undesirably high output conductance (g(ds)= dI(ds)/dV(ds)). A crucial figure-of-merit for analog/RF transistors is the intrinsic voltage gain (g(m)/g(ds)) which requires both high g(m) (primary component of f(T)) and low g(ds). Obtaining current saturation has become one of the key challenges in graphene device design. In this work, we study theoretically the influence of the dielectric thickness on the output characteristics of graphene FETs by using a surface-potential-based device model. We also experimentally demonstrate that by employing a very thin gate dielectric (equivalent oxide thickness less than 2 nm), full drain current saturation can be obtained for large-scale chemical vapor deposition graphene FETs with short channels. In addition to showing intrinsic voltage gain (as high as 34) that is comparable to commercial semiconductor FETs with bandgaps, we also demonstrate high frequency AC voltage gain and S21 power gain from s-parameter measurements.

High-Responsivity Graphene/InAs Nanowire Heterojunction Near-Infrared Photodetectors with Distinct Photocurrent On/Off Ratios

“…The details of simulation method for graphene FETs can be found in the literature. [ 48 ] (from equation 3 to 7). The simulation result perfectly matches with the experiment result.…”

“…[1][2][3][4][5][6][7][8][9][10][11][12][13][48][49][50] The unusual band structure makes it a negligible-gap semiconductor with a linear energy dispersion relation, indicating a vanishing effective mass, a high Fermi velocity, and a high carrier mobility of 200,000 cm .…”

Embedded gate CVD MoS2 microwave FETs

“…11 The embedded gate structure has been shown to significantly improve current saturation in graphene RF FETs, resulting in improved voltage and power gain. 12 Embedded gate FETs using CVD MoS 2 for digital circuits were recently studied, which found increased scalability, with higher yield and uniformity vs. their top-gated counterparts. 13 Additionally, embedded gate CVD MoS 2 FETs show enhancement mode operation, which is essential for complex multistage integrated circuits.…”

Graphene radio frequency receiver integrated circuit

“…We would like to point out that the gapless band structure in graphene typically causes the weaker saturation of the drain current in GFET compared with other semiconductor devices with a bandgap 24 . We have previously shown that by employing a very thin gate dielectric (equivalent oxide thickness less than 2 nm), full drain current saturation (gds ¼ 0) can be achieved in GFETs 25 . Therefore, a higher gain performance can be expected by continuously improving the gate dielectric quality in our IC fabrication process.…”