Current Sensorless Power Factor Correction based on Digital Current Rebuilding

Abstract

Abstract-A new digital control technique for power factor correction is presented. The main novelty of the method is that there is no current sensor. Instead, the input current is digitally rebuilt, using the estimated input current for the current loop. Apart from that, the ADCs used for the acquisition of the input and output voltages have been designed ad-hoc. Taking advantage of the slow dynamic behavior of these voltages, almost completely digital ADCs have been designed, leaving only a comparator and an RC filter in the analog part. The final objective is obtaining a low cost digital controller which can be easily integrated in an ASIC along with the controller of paralleled and subsequent power sections.

Pre-calculated duty cycle control implemented in FPGA for power factor correction

“…Two ad-hoc sigma-delta 10-b A/D's have been implemented on the FPGA and can be easily integrated with the control system. The A/D's require few external components [8]; only a comparator and a first order R-C filter. The two measurements from the A/D's are connected to inputs on the FPGA, and the switching signal is connected to the switching transistor of the boost via a driver.…”

“…In [8] a PFC technique based on the digital reconstruction of the input current on a boost converter is presented. In this technique a current loop is implemented, but since the current values are estimated there is no need in measuring current.…”

Current error compensation for current-sensorless power factor corrector stage in continuous conduction mode

“…Focused on proposing cost-effective solutions without losing performance, current estimation techniques based on voltage measurements are presented in [2][3][4] and [5] for single-phase and multiphase converter applications respectively. For PFC applications, approaches like [6][7][8][9][10][11][12][13] propose the elimination of the traditionally required analog-to-digital conversions. Different authors have presented approaches for Boost sensorless PFC controllers [10][11][12][13] where parasitic elements are measured and taken into account in the controller to compensate for their effects.…”

“…Different authors have presented approaches for Boost sensorless PFC controllers [10][11][12][13] where parasitic elements are measured and taken into account in the controller to compensate for their effects. This work is based on [6,7] where the input rebuilding concept is used. The variable volt-seconds (vs L ) across the inductance is estimated in each switching period, and a small error (current estimation error) per switching period accumulated over the half line cycle, causes current distortion.…”

A Simple Grid-Voltage-Sensorless Control Scheme for PFC Boost Converters

“…As shown in (19), R i is composed of two components, the steady-state dc value and the small-signal component. The small-signal component is defined as:…”