Abstract-A new digital control technique for power factor correction is presented. The main novelty of the method is that there is no current sensor. Instead, the input current is digitally rebuilt, using the estimated input current for the current loop. Apart from that, the ADCs used for the acquisition of the input and output voltages have been designed ad-hoc. Taking advantage of the slow dynamic behavior of these voltages, almost completely digital ADCs have been designed, leaving only a comparator and an RC filter in the analog part. The final objective is obtaining a low cost digital controller which can be easily integrated in an ASIC along with the controller of paralleled and subsequent power sections.

No abstract

Esta es la versión de autor de la comunicación de congreso publicada en: This is an author produced version of a paper published in: Abstract-A circuit that compensates the volt-seconds error across the inductor in current sensorless digital control for continuous conduction mode power factor correction (PFC) stage is presented. Low cost ad-hoc sigma-delta analog to digital converters (ADCs) are used to sample the PFC input and output voltage. Instead of being measured, the input current is estimated in a digital circuit to be used in the current loop. A nonlinear carrier control is implemented in the digital controller in order to obtain the power factor correction. Drive signal's delays causes differences between the digital current and the real current, producing that volt-seconds error. The control algorithm is compensated taking into account the delays. The influence of a wrong compensation is presented. Experimental results show power factor values and harmonic content within the IEC 61000-3-2 Class C standard in different operation conditions. Furthermore, the use of this PFC stage for electronics ballast to compensate the effect of the utility voltage fluctuation in HID lamps is also verified taking advantage of the digital device capabilities.

No abstract

No abstract