The use of a p-n junction diode as a tool for the assessment of the p-well quality is demonstrated, by analyzing in detail the current-voltage and capacitance-voltage characteristics of n ϩ -p-well junctions surrounded by either shallow trench isolation or polysilicon encapsulated local oxidation of silicon. As a reference, diodes fabricated in a p-type substrate and defined by a local oxidation of silicon isolation have been used. Particular emphasis is on the lifetime properties and leakage current activation energy of the p-well region, which has been fabricated by a deep ͑200 keV͒ and a shallow ͑55 keV͒ boron ion implantation. That the leakage current of large area diodes is governed by electric field-assisted generation of carriers from residual, unannealed deep B-implantation damage is demonstrated. The presence of such defects is confirmed by deep level transient spectroscopy analysis. The generation lifetime profile in the depletion region and the reverse current activation energy are extracted by taking account of the electric field enhancement factor of the thermal generation. Finally, it is shown that the generation lifetime and residual defects depend mainly on the global thermal budget and little on the isolation scheme used.The development of deep submicrometer complementary metal oxide semiconductor ͑CMOS͒ technology must consider harmful phenomena such as latch-up and the occurrence of soft errors. To a large extent, the problem can be solved by a local modification of the substrate carrier concentration. This is usually achieved by a high energy ion implantation followed by a dopant activation and damage-removal anneal. However, note that the use of a few hundreds keV or even MeV ion implantation introduces peak displacement damage near the projected range of the ions, which may amount up to several micrometers in the silicon substrate. This damage is difficult to remove even after a high temperature annealing. 1 Furthermore, implementing such a p-well in a submicrometer CMOS technology severely constrains the affordable thermal budget. This results in an insufficient damage annealing. However, as long as the residual defects are far from the junction depletion region, they will be relatively harmless. On the other hand, when lying too close to the junction, these defects may have an impact on the diode current-voltage ͑I-V͒ characteristics. In addition, the presence of vacancy or interstitial type of damage clusters in the p-well may have an impact on the diffusion behavior of both the p-well and the shallow junction dopant species, through point-defect-assisted diffusion enhancement. Therefore, the present paper uses p-n junction diodes, fabricated with different isolation schemes as a tool for the assessment of the residual p-well defects by studying the I-V and capacitance-voltage ͑C-V͒ characteristics in detail.
ExperimentalShallow n ϩ -p diodes compatible with submicrometer CMOS technology have been processed on Czochralski ͑CZ͒ 150 mm diam p-type substrates. Local oxidation of silicon ͑LOC...