Cutting structure-aware analog placement based on self-aligned double patterning with e-beam lithography

Abstract

Self-aligned double patterning (SADP) with complementary e-beam lithography (EBL) is one of the most promising hybrid-lithography techniques for sub-20nm designs. The complementary EBL mitigates the deficiencies of using a single cut mask in SADP. However, the low throughput and negative side effects of EBL might significantly increase the manufacturing costs and damage the symmetry properties in analog circuits. In this paper, we present the first work that considers SADP with EBL during analog placement to simultaneously optimize the area, wirelength, overlay errors, and e-beam shots. We first propose an overlay and cut conflict-aware SADP decomposition algorithm to optimize the overlay errors and e-beam shots in a layout. Then, a dynamic programming based module shifting technique is developed based on a symmetry-feasible slicing tree formulation to further minimize the differences of overlay errors and e-beam shots between symmetry modules during analog placement. To explore and obtain a desired placement, an analog placement flow is also presented. Experimental results show that our flow can effectively and efficiently reduce area, overlay errors, and e-beam shots while satisfying the symmetry constraints for analog placement.