To implement arithmetic architectures there are many approaches available, some with new logic families such as Multiple-Valued-Logic (MVL) [1,2]. In this type of arithmetic systems, the signal levels in the digits are increased from a conventional two-state binary to multiple values. This feature is specially interesting for hardware implementation of neural networks, where a high number of interconnections are required between the network layers. Using a multiple-valued number system can reduce the number of interconnections, and hence reduce the area and power consumption of the circuit.The Continuous Valued Number System (CVNS) falls within the MVL arithmetic category. The CVNS and the basic concept of analog-digits were first introduced in [3], fundamental methods of addition arithmetic and array multiplication were developed in [4,5], and circuit design issues were discussed in [6] and [7].The radix-2 CVNS arithmetic has been very effective and used in development of a series of arithmetic units [8][9][10][11]. This class of the CVNS can interface with the digital inputs directly, and the conversion process between the two number systems is very simple. The radix-2 CVNS is also used for implementation of mixed-signal multipliers [12]. The multiplier is useful for implementation of high density CVNS neural networks, where a high number of adders and multipliers are required. The CVNS multiplier is compact, area efficient, and its operations are verified under different environmental conditions.